Modern Wire Bonding in Package Assembly
Wire bonding remains the dominant chip-interconnection method—and it's not going anywhere soon. This webinar offers a practical overview of modern wire bonding processes, metrology challenges, and emerging materials. Learn about pitch shrinkage demands, direct bonding to Cu on ULK substrates, and innovations like silver and gold-coated palladium copper wires. Explore key bonding techniques including thermosonic, ultrasonic, and thermocompression, plus new options for Cu wire coatings.
Perfect for engineers navigating next-gen packaging and reliability.
Speaker Bio:
Dr. Dory has extensive experience in microelectronics covering semiconductor fab processing and assembly, hybrid circuits, and package assembly & test. He has worked in many different aspects of semiconductor manufacturing, including plasma deposition, RTP, and packaging technologies, while at Intel Corporation. Dr. Dory retired from Intel in the Assembly and Test Technology Development Research division after 20 years in R&D. As Pathfinding Integration Manager of the Intel Substrate Technology Research Labs, he was responsible for the development of advanced packaging technology in the areas of MEMS, wafer-level bonding, stacked die packages, and line pitch reduction designs. He specialized in packaging and assembly, focusing on high-density substrate manufacturing and chip assembly, including wire bonding, flip chip, and 3D packaging.
Dr. Dory was a lecturer on the Arizona State University chemical engineering faculty, teaching semiconductor processing and all transport phenomena. He is the author or co-author of over 35 patents and publications in the areas of semiconductor chemicals and package design, including underfill applications and embedded package capacitors. He is a member of the Electrochemical Society and a Senior Member of IEEE.