System in Package: Identified Technology Needs from the 2994 iNEMI Roadmap

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System in package (SiP) technology has grown significantly in the past several years. It was barely mentioned in the National
Electronics Manufacturing Initiative’s (NEMI’s) 2000 roadmap,but by the 2002 roadmap,SiP was one of the fastest growing
packaging technologies. Even though,at that time,SiP represented a relatively small percentage of the total unit volume,the
2002 NEMI roadmap noted that SIP was becoming a common technology in the high-growth Bluetooth,WLAN (wireless
local area network) and mobile phone applications. By 2004,SiP had grown so significantly that it was added to the roadmap
as a new product emulator group (one of seven),which are used to define future manufacturing needs across the entire
electronics supply chain.

Author(s)
James Mark Bird
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Semiconductor Technology ITRS Roadmap

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For four decades,the semiconductor industry has distinguished itself by the rapid pace of improvement in its products. The
principal categories of improvement trends are shown in Table 1 with examples of each. Most of these trends have resulted
principally from the industry’s ability to exponentially decrease the minimum feature sizes used to fabricate integrated
circuits. Of course,the most frequently cited trend is in integration level,which is usually expressed as Moore’s Law. (i.e.,
the number of components per chip doubles every 24 months). The most significant trend for society is the decreasing costper-
function,which has led to significant improvements of productivity and quality of life through proliferation of computers,
electronic communication,and consumer electronics.

Author(s)
Alan Allan
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Novel Material having Low Transmission Loss and Low Thermal Expansion designed for High Frequency Multi-layer Printed Circuit Board Applications

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A new multi-layer PCB (printed circuit board) having low transmission loss and low thermal expansion that meets up-coming
further high speed and high volume data transmission demands was developed. New modified polyphenylene ether (PPE)
resin that posses excellent dielectric as well as thermal properties (Tg>200ºC) has been successfully designed and developed
in house. The selection of a PPE backbone structure let us realize low Dk and low Df of the PCB,resulting in lower
transmission loss. Low CTE of the PCB was achieved by incorporating inorganic fillers,while keeping low Df. By using
special VLP copper foil,high-speed data transmission performance was improved significantly. The Dk,and Df of the
developed PCB is 3.4-3.6,<0.002(1GHz) respectively and CTE in z direction is 45-50ppm. These are the basis of our
development. We demonstrated about 50 % reduction in transmission loss in comparison to FR-4. Because of its low CTE,
the PCB indicated excellent through-hole reliability. Over 2000 cycles of reliability were observed in its heat cycle (T/C;
-65ºC to 125ºC) test. It was 4 times better performance than that of FR-4. The PCB showed high CAF resistance as well. No
distinct failure was observed within 300 hours in its HAST (110ºC/85%/50V). Accordingly,newly developed our PCB has
reliable performance. The PCB is compatible with the conventional PCB manufacturing process. Thus,we believe our newly
developed PCB will offer one of the most promising solutions to achieve ultra high speed signal transmission technology that
will play a very important role in the emerging era.

Author(s)
Hiroaki Fujiwara,Hiroharu Inoue,Shoji Hashimoto,Mitsuhiro Nishino,Kiyotaka Komori and Tatuo Yonemoto
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Environmentally Friendly Low Transmission Loss Base/Multilayer Materials

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The frequencies used to communicate and process information have been extended beyond the GHz band to the microwave
band to handle the growing volume of data. Moreover,increasing global interest in environment protection is calling for base
materials for printed wiring boards (PWBs) that can be based on restriction of the use of certain hazardous substances. We have developed new low- transmission-loss multilayer materials that have extremely low flammability without using any
halogenated compounds.
The original resin modification,resin formulation,and flame retardant system techniques have enabled us to produce these
new base materials having good dielectric characteristics (lower dielectric constants and dissipation factors),good flame retardancy,and high heat resistance. They will meet the requirement of high temperature soldering process using lead-free
solder.

Author(s)
Hiroshi Shimizu,Kenichi Tomioka,Shinji Tsutikawa,Nobuyuki Minami,Yasuhiro Murai
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Flexible PCB Plating Through Hole Considerations,Experiences and Solutions

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Due to the worldwide increase in demand for flex and flex-rigid panels as well as the shift in the required designs of panels
there is an extreme need for improved PTH processing. There are several proven routes for high technology flex / flex-rigid
manufacturing as well as for high volume applications,but lately there have been some developments. From this
presentation,along with suitable examples,we aim to give an insight into the current status of flex / flex-rigid manufacturing,
from the point of view of PTH processing,as well as suitable solutions to common manufacturing issues.

Author(s)
Neil Patton
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

New Concept Multi-Layer FPC “SBic” For High-Density Device Mounting

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We have developed a thin,high-density device-mounting,multilayer flexible printed circuit (hereinafter flexible printed
circuit is referred to as FPC) “SBic” (stands for Solder Bump Interconnection Circuit) based on our original materials and
manufacturing technologies of FPCs.1)
The features of this multilayer FPC are attainment of high-density device mounting,high reliability,and super-thin thickness,
for example six layers: 0.3mm,eight layers: 0.4mm,etc.,with an all-layer IVH (stands for Interstitial Via-Hole) structure.
The interconnection consists of a solder bump,which has a copper bump as the core,and a capture pad. The flux activity of
Deoxidizable Bonding Film,our proprietary interlayer adhesive,supports the bump and the pad connected by solder.
We verified formation of the alloy of tin and copper by cross sectional observation. The reliability of the interconnection
passed a temperature cycle test (1,000 cycles at the range of -25°C to 125°C),a thermal shock test (100 cycles at the range of
room temperature to 260°C),etc. The conductive resistance of the interconnection kept an almost theoretical value during the
temperature cycle test.
We adopted the simultaneous interconnecting lamination of all-layer method,and attained shortening of the processes and a
high yield ratio. Moreover,halogen-free and lead-free materials were adopted for all the components in consideration of
environmental protection.

Author(s)
Toshiaki Chuma,Toshio Komiyatani,Mikihiko Ishibashi
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Lead-Free Solder Flip Chips on FR-4 Substrates with Different Assembly Processes and Materials

This study is focused on using different assembly options such as dip fluxing,flux jetting and reflow encapsulate for 200-
250um pitch lead-free (SnAgCu) flip chips on FR4 substrates. The impact of different PCB surface finishes (OSP and
ENIG),was investigated from an assembly perspective. Different underfill materials including an acid anhydrate based
material and two non-acid anhydrate based materials were evaluated for compatibility with the flux and lead-free solder
bumps and process. A reflow encapsulate designed for lead-free soldering is also studied from an assembly point of view.

Author(s)
David Geiger,Dongkai Shangguan,Jonas Sjöberg,Todd Castello
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Optimization of Lead-Free Soldering Processes for Volume Manufacturing

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In this paper,a comprehensive review is provided on the optimization of soldering processes (including reflow,wave
soldering,and rework),for different component types,different PCB sizes and finishes,and in different soldering
atmospheres (air and nitrogen). The impact of key process parameters on the process yield is discussed in comparison with
the Sn-Pb soldering process,and methodologies for optimizing the lead-free soldering processes are outlined. Component
compatibility issues are also discussed.

Author(s)
Dongkai Shangguan
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Conductive Polymer Imaging For Communications and Electronics

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Conductive inks and polymers based on metals were originally envisaged for quick repairs to Printed Circuit Boards (PCBs)
and semiconductor chips. Increasingly these materials are being used to replace traditional copper circuitry. Modern PCB
production suffers from high capital expenditure in process set-up and ever growing environmental and legislative
constraints,which can be replaced with quick,affordable and environmentally friendly polymer based manufacturing. New
chemistry and imaging techniques have led to the development of an increasing variety of means to deposit and pattern these
materials. Substrates include glass and FR4 as well as flexible materials such as nylon,polyester and Kapton. Conducting
inks and polymers include those based on Carbon,Silver,Copper and Gold. The resulting combination of polymer and
substrate leads to a large number of solutions for interconnects and circuitry on surfaces as diverse as battleship hulls,mobile
phone casings and clothing. In the example of a mobile phone it is possible to connect chips to packages to PCBs to displays
to batteries to antennae on the casing of the object itself using a single polymer material. Many of the subsystems such as the
PCB and the antennae can also be made from a conducting polymer deposited and patterned on the casing. The natural
extension of this is to use flexible substrates and turn the casing into a 2D sheet and thus manufacture a mobile phone that
can be rolled up. By way of example the manufacturing process for a polymer antennae within a mobile phone case is
demonstrated using silver-based ink.

Author(s)
Richard Mosses
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Implementing Laser Marking of Printed Circuit Boards

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Manufacturers of electronic devices,from home audio equipment to automotive keyless entry systems,are increasingly
seeking a reliable,cost effective method for uniquely identifying and tracking products through the manufacturing cycle,
sales distribution and after-sale warranty verification. An autonomous,automated tracking system requires that a permanent,
machine-readable code be applied to an internal printed circuit board to uniquely identify each product. The code must be
durable enough to survive manufacturing processes including wave solder and board cleaning,must not affect circuit
performance,and must store information in the small space available on real-estate conscious printed circuit boards.
The 2D matrix code provides a means to store alphanumeric character strings in very small areas of the printed circuit board.
Laser marking technology provides a method for permanently applying 2D matrix codes to most commonly used board
substrates and conformal coatings. The high-resolution and high-accuracy of beam-steered laser marking systems provides
the means to create well-defined codes for high-reliability reading regardless of code size. Laser marking also provides a
fully computer-controlled marking process for easy implementation into an automated product tracking system.
The operating principles of beam-steered laser marking systems utilizing both CO2 (carbon-dioxide) and Nd:YAG
(neodymium:yttrium aluminum garnet) lasers will be discussed in terms of compatibility with substrate materials,marking
performance,cost of acquisition and operation,maintenance,and integration with computerized product tracking systems.
Subjects will include the data capacity of 2D matrix codes (Figure 1) and their corresponding sizes with the marking
capability of laser systems. Installation in SMEMA-compliant manufacturing lines while maintaining a laser safe
environment will be discussed. Samples of overall productivity will be presented for several board marking scenarios
including single board and multi-up board configurations.

Author(s)
Rick Stevenson
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005