Evaluating the protective efficacy of ruggedizing polymers using condensing environments is an innovative approach that can help simulate real-world conditions. Protective polymers are increasingly utilized as electronic assemblies move to harsher environments, the combination of board level contaminants, moisture and electrical bias makes it difficult to achieve reliability in high-density electronic assemblies. Understanding their behavior under varying environmental conditions is crucial. We conducted a series of experiments using a novel condensation test set up to evaluate how moisture exposure (condensing environments) influences the durability of polymer formulations. Our findings reveal that both chemistry and uniformity significantly affect the polymers’ integrity and barrier properties. Coating deterioration on free edges leads to accelerated degradation in wet conditions, highlighting the need for optimized formulations tailored for specific environmental challenges. These insights contribute to the development of more resilient materials, enhancing their application in harsh settings.

Many of today’s advanced electronic devices require the use of solderable preforms in applications, including solder thermal interface materials (TIMs), power module attach, and any other application where two surfaces need to be joined with a fluxed preform. The solder joint should be free of surface defects, volume defects, and/or voids. Voiding in solder joints can cause decreased thermal performance, hot spots, and in some cases, delamination. The next generation of developed preform flux greatly reduces the void quantity in solder joints compared to the current generation of preform flux. Unexpectedly, the “colder” the reflow profile, the better the voiding performance. For SAC305 alloys, the overall voiding across all substrates is reduced, on average, by about 28%, when used with the next generation of preform flux. When combined with a lower melting solder that sees a maximum reflow temperature of 210°C, the voiding is reduced by greater than 46%. Moreover, when coated on a pure indium preform and reflowed with a peak temperature of 170°C, the voiding is further reduced, yielding a solder joint that has a 67% reduction in solder voids compared to the current generation of flux coated preforms. This paper will review the genesis of this new flux technology and the testing done on various alloys and substrates, showing that this next generation of preform fluxes greatly reduces voiding compared to previous generation of preform flux.
Key words: preform, voiding, flux

The paper presents the development of an innovative recyclable and biodegradable PCB substrate material created to meet the stringent environmental demands of future electronic products. The substrate's technology readiness levels (TRL) are reviewed along with the current stages of testing and trial applications. The material addresses sustainability and environmental challenges by achieving carbon emission reductions of approximately 70% relative to conventional options whilst satisfying application appropriate standards of performance and usability. The product has been successfully trialed across many industry sectors, the paper details the achievement of equivalent critical performance metrics such as comparative tracking index, permittivity and UL flame rating with incumbent materials. The paper provides insights into how it offers OEMs, ODMs, and designers a viable pathway to significantly reduce carbon emissions in the PCB industry without compromising on quality or performance.

The increasing demands on electronic systems have led to the current trend of using chiplets instead of individual chips. In detail, this means that individual silicon components or functional units, which can also be developed and manufactured independently of each other, are combined to form a very powerful overall system. Since the miniaturization of semiconductor chips is a major challenge, minimizing the wiring length in the package by using denser and thinner connections is critical. The high number of inputs and outputs (I/O) in these high-density packages reduces the structural size of lines and spaces (L/S), and the quality of the interconnect can drastically affect the performance of the device. This paper presents the development of the necessary technology blocks for high-density redistribution layers required to realize such organic substrates.
The technology used is advanced semi-additive processing (aSAP) for large panels. This technology includes the use of dielectric layers such as Ajinomoto build up film (ABF) or similar, physical vapor deposition PVD seeding and additive electrolytic copper deposition.
Vertical interconnects can be produced by laser drilling, lithography using photo imageable or plasma with reactive ion etching (RIE). The process capabilities and limitations are discussed in detail.
Horizontal interconnects are produced by PVD seeding, photoimaging of resist masks and subsequent copper deposition, and resist and seed removal. Photo-imaging is an important step in this process. The development towards line and space structures targeting 5 μm and further 2 μm on large panels up to 510 x 515mm² is described in detail.

The IPC-1782 traceability standard is a key part of the IPC Factory of the Future ecosystem, providing a framework for ensuring trusted product and material provenance. The purpose of this standard is to assist material, component, and assembly manufacturers with maintaining product integrity throughout the supply chain.
It is important that all stakeholders in the supply chain have visibility into product movement, ensuring data transparency and validating the authenticity of packages as ownership changes throughout the process.
Provenance captures the origin and life journey of any asset—such as a component or a product—including its ownership history, custody, location, and more; covering all participants in the supply chain. Provenance data is crucial for meeting regulatory requirements, mitigating the risk of counterfeiting, supporting sustainable practices, and strengthening the resilience of supply chains.
This paper demonstrates the value of provenance data by presenting a standards-compliant Proof of Concept (PoC) that tracks the state and movement of assets through each Event Processing Task outlined in IPC-1782. It focuses on a real-world electronics manufacturing scenario and, as recommended by IPC-1782, utilizes an open-source, blockchain-backed provenance platform.
The PoC illustrates the value of combining external supply chain provenance with internal manufacturing traceability. By integrating with a Manufacturing Execution System (MES) and Supply Chain Management (SCM) platform, and leveraging industry standards like IPC-CFX and W3C’s PROV-O and PROV-DM, a seamless data flow can be established spanning both internal manufacturing processes and supply chain logistics to provide a holistic, end-to-end view of the product lifecycle, from raw materials to finished products.

For many years, metals have been used as thermal interface materials (TIMs), and until recently, the most common type of metal TIM were solder TIMs. Due to their high reliability and thermal conductivity, metal TIMs are excellent solutions for heat dissipation in electronic systems, especially for more challenging applications. Thermal conductivity and interfacial resistance are the most important properties of TIMs. With devices becoming smaller, consuming more power, and producing more heat, finding the right TIM becomes a highly critical step in any electronic systems application. Recently, liquid metal TIMs have gained popularity, especially for the thermal management of high-performance computing semiconductor applications such as central processing units (CPUs), graphics processing units (GPUs), and multi-chip modules (MCMs). Due to their fluid nature, liquid metal (LM) TIMs do not need to be compressed to maintain even contact, and they can accommodate imperfections in the neighboring components. The newest metal TIMs are made of liquid metal paste (LMP). LMPs are materials that still have gallium-based LMs as a key component, but they also have some additives that change their mechanical and/or thermal properties. The goal of those LMPs is to solve some of the issues that LMs have as a TIM.
The first part of this paper addressed pure metal LMPs, where all additives were metals. This second part will discuss new types of LMPs that combine gallium-based LMs with polymeric materials, such as polymer LM hybrids or polymeric liquid metal pastes (PLMPs). Polymer LM hybrids or PLMPs look like standard thermal pastes or thermal greases, but they have a high LM content. Just like the LMPs presented in the first part, PLMPs are less prone to oxidation and humidity, will have better performance in thermal cycling (-40/+125˚C) than LMs, and are electrically non-conductive* despite the high LM count used to create PLMPs. This paper addresses the challenges of the recommended dispensing process for the high-volume production of those PLMPs.
*PLMPs are electrically non-conductive at time zero (T0). More testing is required to prove that they will stay that way over time and that there will be no separation of LMs from PLMPs.
Key words: Bondline thickness (BLT), coefficient of variation (CV), dispensing, jetting, liquid metal (LM), liquid metal paste (LMP), polymeric liquid metal paste (PLMP), phase change material (PCM), solder paste inspection (SPI), thermal interface material (TIM), thermal test vehicle (TTV)