A comparative study of package-to-board interconnections of a 1.27mm pitch BGA package using two Pb-free alloys and Sn-Pb solder in extended –40 to 125°C thermal cycling is described. The microstructural evolution,intermetallic compound growth,and progressive damage in the solder joints were documented using visual,x-ray,SEM,and EDS analysis. The analyses indicate that intermetallic compound growth in the Pb-free solder joints can contribute to void retention in Pb-free solders. Sn/Ag intermetallic plates often formed across the grain boundaries and redirected or retarded crack propagation in many instances. In addition,Sn-whiskers were found inside voids and intermetallic formations extending outward from Sn/Ag and Sn/Ag/Cu solder joints as the number of temperature cycles increased. Crack propagation included the formation of vertical and horizontal cracks in random solder joints. The preferred propagation path of the vertical cracks is shown to be through the large angle grain boundaries in the solder. Spalling or separation of portions of the solder joints can also occur. The observations provide insight into the effects of long-term thermal mechanical stresses and the attendant failure mechanisms in Pb-free solder interconnections.

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The texture of a tin deposit has been described as a key factor influencing whisker growth. Based on X-ray diffraction (XRD) and whisker growth data,this paper intends to show one possible mechanism that contributes to the formation of whiskers. By correlating observed XRD patterns with whisker growth performance in tin electrodeposits,a model has been created to approximate the risk of whisker growth. With some limitations,this model was found to be valid in predicting the extent of whisker growth in tin deposits.

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There are two main driving forces that are causing the electronics industry to take a look at alternatives to hot air solder leveling (HASL) as a surface finish for printed wiring boards (PWB). First,finer pitch array packages like micro-BGA and chip scale packages are being used in increasing volumes and for a broader variety of devices. With reducing pitches,and thus smaller ball diameters,it becomes necessary to have a predictably flatter surface in order to achieve a consistently more reliable solder joint. The inherent nature of the HASL process to leave inconsistent and uneven topographical profiles of the PWB pad surface,has been well observed and documented. Alternative finishes such as organic solderability preservative (OSP),immersion tin,immersion silver,electroless nickel/immersion gold (ENIG),etc.,have been proven to provide the flatness desired – several orders of magnitude flatter than HASL. The second reason to consider HASL alternatives is the move toward lead-free electronics,particularly in Europe and Japan. With legislation already approved in Europe and a strong focus on environmental marketing in Japan,the demand on PWB fabricators to produce “unleaded” product will no doubt see a marked increase over the next several years. In the United States,organizations such as IPC,the National Electronics Manufacturing Initiative (NEMI),and others have been heavily involved in research activities related to lead-free materials over the last several years. Although the US has not produced any legislative mandates (as of this writing) on the removal of lead from electronics,research activities are ongoing.

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Lead-free manufacturing is becoming an industry initiative for environmental and legislative reasons. Lead-Free processing is rather new to the industry and the development of a successful assembly process requires collaboration among the end user,the component and board suppliers,and the electronics manufacturer. This paper will document the Phase 1 development plans and results for converting a surface mount network card into a lead free product. Phase 1 involved changing the eutectic tin-lead solder paste used in manufacturing to a lead-free paste (Sn3.9Ag0.6Cu),use a lead-free surface finish PCB (Immersion Silver),and a lead free PBGA component. The higher process temperature of the lead-free solder paste poses greater risk to the component materials which were not made to withstand these higher temperatures. A statement of work and a development plan to certify the process according to the product and process qualification requirements were created. The development plan included the statistical design of experiments and process and product qualification requirements. The certification plan included four separate lead-free manufacturing builds,with functional and ICT contact resistance testing,followed by multiple reliability tests. The lead-free manufacturing builds revealed issues such as connector material blistering due to the higher processing temperatures and the insufficient solder joints on the LED soldered component. Root cause analysis was performed and defect reduction plans were implemented. The results demonstrated the capability to build a lead-free SMT network product. Reliability test data further confirmed that the lead-free product assembled met all the customer’s product qualification requirements.

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A growing need is developing in the high-speed digital arena (backpanels,motherboards,line cards etc) for materials offering sufficient signal integrity for applications up to 10 Gbps. One solution is a PTFE/ fiberglass/thermosetting resin composite1 that can be processed at conventional PCB pressures and temperatures. Because the PTFE can be applied in a high volume process by a PTFE processor and the thermosetting resin can be applied in a large scale manufacturing process using commercial treaters,the volume manufacture of PTFE based laminates can be achieved in a cost effective fashion. The prepregs and laminates are based on a PTFE/fiberglass/BT-epoxy composite that is treated with 10-40 wt% of a thermosetting resin. The resulting composite has demonstrated signal integrity in a 20 layer backplane that is very competitive relative to a pure PTFE/fiberglass construction2. The hybrid has a very low dissipation factor when 15-40 wt% thermosetting adhesive is used (0.004-0.005 at 14.5 GHz). The PTFE/fiberglass/BT-epoxy composite provides good bonding to substrates at conventional processing temperatures,gap filling of 2 oz circuitry,very high thermal stability,and predictable movement. Preliminary results suggest that the materials drill better than standard PTFE boards.

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