Applying underfill materials to the bottom of components prior to shipping to the 2nd level end-user is very desirable
in that it would eliminate the underfill process from the end-users assembly line. The overall value to the end-user is
tremendous. It eliminates the need for special equipment to process underfill materials,allows more flexibility
during the product design phase and minimizes employee exposure to wet chemicals.
This paper will examine the key application and process challenges associated with implementing the use of
package-applied underfill. Included in this will be the challenges of physically putting the underfill on the
components at the 1st level component suppliers as well as the effects on 2nd level assembly operations,such as
component placement,reflow (effect on interconnect) and reliability performance.

A simple and cost effective method has been developed in order to test adhesion of components to a circuit board
via a reflow encapsulant. Originally,a mechanical shock test similar to current methods was used that involved
physically dropping the test board from a given height and orientation. However,the majority of the reflow
encapsulant materials tested were able to withstand numerous drops without any signs of failure. A standard die
shear test did not provide the mechanical shock that the board would experience when being physically dropped. For
those reasons,a guillotine type of device was constructed which provided the opportunity to reproducibly deliver a
force to any desired area of the test vehicle. The "blade" of the device was fitted with a known mass,which is easily
varied. The test vehicle used in this test contained three types of components; two BGA's (225I/O,15x15 Ball
Matrix,Full Array,1.5mm Pitch),three CSP's (48I/O,10x10 Ball matrix,Perimeter Array,1.0mm pitch),and one
quartz slide (12mm x 12mm). Several failure types have been observed and noted. Electrical continuity was used as
a failure mode where applicable. Another mode of failure was observed as cracking/delamination around the fillet of
the BGA's and CSP's,and underneath the quartz test dies. The final failure mode noted was where the components
were entirely broken off of the circuit board. The details of the testing apparatus will be presented along with the
results on materials with differing abilities to survive the test cycle.

In this work,we have evaluated the use of underfill to enhance the reliability of small BGAs in the automotive
thermal cycling environment. Best parameters for underfilling of BGAs were developed during a processing study,
and then a set of test boards was assembled with several 15 and 17 mm body size BGA components from two
different vendors,and four different underfill encapsulants. Larger 23 mm BGAs (non-underfilled) have also been
included in the test matrix as a control/reference. The assembled test vehicles have been subjected to 6000 thermal
cycles over the range -40 to 125 oC,and the daisy-chain resistances of the various components were monitored
throughout the testing. Logged failures have been statistically analyzed using two parameter Weibull models. The
analysis results have allowed the board level reliabilities of the examined BGA components to be compared and
ranked,and the reliability enhancements achieved with various underfills to be accessed. Detailed failure analyses
have also been performed to find the locations of solder joint fatigue crack growth,and to identify other failure
modes occurring in underfilled parts. Finally,heat transfer studies have also shown that use of underfill can
significantly reduce the junction to case thermal resistance of the BGAs.

It is stated that some degree of voiding is acceptable and inevitable when soldering electronic components,and
specifically BGAs. There have been many publications which discuss this phenomena,the reasons for,how to
detect,what is and isn’t acceptable,reliability etc. this paper looks from a practical approach,in a production
environment as to the causes,minimisation,detection and measurement of voiding,and some discussion on it’s
impact on reliability.
A void is defined as a “bubble” of air entrapped within a solder joint. Due to surface tension effects this is
generally spherical in shape. There can also be single void,or multiple voids within any joint; the significance
of these is also discussed.

The endless quest for increased performance in less space has recently manifested itself in 0.5mm pitch Chip Scale
Packages (CSP). The footprints of these packages are only about half the size that of a 0.8 mm-pitch CSP but they
require much tighter control of the assembly process. It becomes particularly challenging when various CSP
packages with structural differences are present. One new type of 0.5mm CSP is manufactured in wafer form,and
contains solder balls that are about 50% larger in volume than the typical CSP component for this pitch. In general,
the BGA type component with higher standoff height is theoretically more reliable during thermal cycling.
However,the enlarged ball on a 0.5 mm pitch device introduces new challenges to the assembly process. This paper
describes the manufacturability and reliability assessment of the 0.5 mm Wafer Level CSP (WLCSP) component
with oversized balls. This work was conducted by a development team comprising of members from different sites
of a global contract manufacturing company. The design and assembly process variables were isolated to determine
their effect on board level reliability. The results can further enhance the PCB assembly process for this type of
components in the future production environment.

To characterize the paste printing process,both the individual aspects of the process and the interactions between the
aspects must be understood. The main aspects of the printing process are paste,stencil,printer and board. Each can
be singularly optimized to obtain desired results,but the system as a whole should be optimized to yield the most
robust process.
The profiling process can often be overshadowed by the importance of proper printing. It is in the reflow process
where the interconnections are permanently formed,and great care should be taken to ensure that these connections
are formed under the proper thermal conditions. Profiling methods,profile types,and resulting reflow recipes are
also discussed.

Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the
total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method
can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and
software limitations. A novel method of making a copper “sandwich” to simulate under lead and under component
environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder
paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage
effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint
for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.

A number of prior studies have established that solid state migration of solder alloy elemental phases will occur as a
function of temperature,time and voltage bias through the solder joint. This study undertakes to develop and
evaluate a novel semi-quantitative means of physically characterizing the degree and amount of phase segregation
taking place in reflowed BGA solder joints. This is accomplished through the use of quantitative image analysis of
overall and regional area spatial relationships of cross sectional SEM micrographs of BGA joints. The SEM images
distinguish between the metallurgical phases on the basis of their differing atomic masses. Statistical comparison of
various image regions within a joint subsequent to reflow facilitates computation of an index to assess the degree of
solid state movement within a BGA joint with time.

Although wave soldering has not historically been considered a well-controlled process,its evolution over the past
decade makes it a prime candidate for effective control methods. These methods are not complex,but relatively
simple and inexpensive to implement and maintain. Furthermore,they can be applied to lead-bearing or lead-free
processing.
Wave soldering is a relatively simple process to convert to lead-free,but the conversion brings subtle changes that
result in a tighter process window. This paper outlines the harmful effects of out-of-control process parameters and
describes methods of measuring and tracking them to keep them in control. It identifies and addresses the critical
variables of wave soldering - flux deposition,preheat application,conveyor speed,solder temperature,solder
contact time – and describes the similarities and differences between lead-bearing and lead-free processing.

Currently,PWB industry is striving for the cost down at the daily PWB manufacturing,and at the same time,they are
developing the higher density PWB for the future application.
The emerging 300 kmin-1 spindle will shift the overlapping point from mechanical drilling to Laser drilling for the Through
Hole (T/H) of PWB core material smaller than 100 µm diameter.
The micro via drilling for glass reinforced core material smaller than 75 µm dia. by CO2 Laser machine,and 20 µm dia. by
UV laser for future application are under study. Now I would like to share the stage of development for mechanical and
Laser drilling technology.