IPC-4552 and IPC-4556 are industry performance specifications for ENIG (Electroless Nickel/Immersion Gold) and ENEPIG (Electroless Nickel/Electroless Palladium/Immersion Gold) as used for the surface finishes for printed wiring boards (PWBs). As both surface finishes are considered multifunctional in nature—solderable, wire bondable, and usable for contact switches—these performance specifications detail the many considerations for these critical surface finishes. One area of detail surrounds the acceptable coating thicknesses of the different layers of both PWB surface finishes. Much of the attention paid to ENIG and ENEPIG is focused on the precious metal layers: gold for ENIG and both gold and palladium for ENEPIG. Both documents also specify the thickness requirements for the electroless nickel layer; however, these requirements are often misunderstood. The thickness and phosphorus content of the electroless nickel layer play critical roles in the solderability, functionality, and reliability of modern electronics. Thickness measurements of electroless nickel are affected by the phosphorus content (wt.% P) in the nickel deposit. Therefore, the phosphorus content (wt.% P) in the deposit must be considered a critical variable when creating an uncertainty budget and measuring the thickness of electroless nickel.

Cupric chloride etchants are often used in PCB fabrication. They use Cu+2 to oxidize solid copper producing two Cu+ ions.[3] During operation, the etchant is overloaded with copper ions. To control concentration, an extraction system is implemented to remove excess copper. Traditional systems use liquid-liquid extractions. These systems are costly and use hazardous solvents. An electrowinning cell cannot be used because this process can release chlorine gas.[1]

A solution to this problem lies in ion-exchange resins. These resins adsorb metal ions and retain them until desorption.[2],[4] A study for effectiveness was performed using a small-scale column. Adsorption and desorption were performed with varying flow rates. Results showed that the resin effectively removes copper at various flowrates. The resin was found to remove an average of 10.06g/l Cu from a bulk volume of three beds of etchant.[1] The effectiveness is a function of the Cu concentration in the etchant and the flow rate through the resin. The relationship(s) between process time, throughput, and flow rate was investigated.

The extracted copper was desorbed from the resin using a 200g/l sulfuric acid electrolyte. The electrolyte effectively striped copper from the resin even as the copper concentration exceeded 40g/l.[1] An electrowinning cell can be used to safely remove the copper from the sulfuric acid electrolyte yielding Cu for sale or recycling. The system does not rely on liquid-liquid extraction or hazardous solvents. This is environmentally friendly as the only waste is copper plates. In contrast traditional systems produce hazardous waste when replacing the organic solvent.

In the printed circuit board (PCB) industry, the surface finish acts as both protection layer and as active enabler for a broad variety of interconnecting techniques. The deposition of gold is one of the most common processes as it is applied in Ni/Au, Ni/Pd/Au, and Pd/Au finishes. Depending on the target thickness, different types of gold electrolytes are available on the market. They differ in the plating mechanism from fully immersion reaction type to mixed reaction type gold electrolytes. In mixed reaction type gold electrolytes, the plating mechanism is as a mixture of immersion reaction and autocatalytic reaction. The reducing agent defines the portion of the autocatalytic part in this mixed reaction. To control the autocatalytic reaction, stabilizers are used which typically contain free cyanide to support the gold complexation and prevent spontaneous decomposition and plate out.

In this paper, a new gold electrolyte is introduced which exhibits autocatalytic properties to deposit high layer thickness and defect-free electroless nickel immersion gold (ENIG) deposits where the stabilizer is nontoxic and does not contain free cyanide. By this it enables an easy, safe, and stable process handling up to bath lifetimes of more than 8 g/l gold with a gold concentration of 0.5 g/l. It was tested for Ni/Au, Ni/Pd/Au, and Pd/Au deposits; the performance results were compared to the process currently applied in the industry. The evaluation focuses on the solder joint reliability of the layers, the corrosive attack to the nickel layer, the thickness distribution, and the characterization of the gold deposit.

This paper describes the novel use of Fused Filament Fabrication (FFF) 3D-printing technology to create plastic, positioning and retaining structures directly onto the surface of standard FR4 printed circuit boards (PCBs). The 3D-printed structures are retaining walls that enable the encapsulation and protection of specific, critical or sensitive components and circuits on PCB assemblies. Industries having products operating in harsh environments, e.g., Automotive, use encapsulants and other polymeric materials to provide PCB assemblies with protection from moisture and other external influences. An efficient and cost-effective solution for the protection of critical electronics components is desirable. 3D Printing allows for customization and different PCB assemblies and structures may be manipulated using the same printer. Plastic retaining walls were 3D printed onto modified, IPC-B-24 surface insulation resistance (SIR) Test PCBs as a demonstration of the technology. The materials and equipment used to print the 3D-plastic retaining walls are conventional, relatively low cost, and readily available. The FFF 3D printer, process parameters, and the FR4 PCBs required physical modification and print parameter optimization to achieve robust attachment of the printed retaining walls onto PCB substrates. The retaining walls could be printed in under two minutes, thus enabling the possibility of volume scalability. Design features were incorporated into the printed structures to reduce thermal stress. This case study describes a design, equipment, process, and materials methodological approach for the 3D printing of plastic retaining walls onto PCBs. The retaining walls assist with the encapsulation, protection, and test of critical circuits operating in harsh environments.

Direct Digital Manufacturing (DDM) combines additive and subtractive manufacturing methods to fully fabricate Printed Circuit Structures (PCS). Harnessing the flexibility of additive methods, designers may embed electronics into functional structures. This flexibility is made possible through the additive deposition of structural plastics and conductive pastes in the DDM process. For PCSs, traces are typically formed with a single layer of silver paste deposited through direct ink writing (DIW). Vias are formed by fully filling cylindrical cavities with silver pastes. However, DDM conductive features see performance far below copper and experience via yields far below that of traditional PCBs due to current manufacturing techniques and thermal limitations of the structural plastics.

A method involving stacking conductive traces was developed. This method of stacked 20µm-layers showed a 92% reduction in resistance of a trace when compared to a single-layer trace of equal height. The second method presented in this work involves coating only the walls of the via with conductive material using a novel vacuum extraction technique. Using this method, a 98 percent yield within an array of 50 printed vias has been achieved. Resistances through the via were measured to average 4mΩ. A demonstration PCS is then presented to show the impact these improvements have compared to previous DDM methods. The PCS features comparisons on trace and via resistances, and via yields, in a circuit environment representing typical additive electronics, and shows the potential for additively manufactured electronics to achieve higher levels of complexity and performance.

High reliable lead-free alloys are suitable for high operating temperatures and longer temperature-cycling time. The Innolot alloy,for example, is based on the tin-silver-copper (SAC) metallurgical system and contains additional elements to harden the alloy and to increase its creep strength in order to significantly improve the reliability of solder joints. Compared to traditional SAC alloys, the characteristic lifetime can be enhanced on the base of temperature cycle test (TCT) from -40°C to +125°C or even extended to +150°C.

Assemblies in the automotive industry increasingly require higher reliability for safety-relevant and new emerging applications such as advanced driver-assistance systems (ADAS). Cost-reduction requirements demand a new approach for optimized soldering materials and processes. The investigation in this paper shows that, with an improved alloy composition, the material cost of high reliable alloys can be reduced. Additional cost benefits are achieved by transferring the reflow process to air atmosphere while maintaining high solder-joint quality. This breakthrough was possible due to a combined approach of alloy and flux optimization, which resulted in an innovative, high reliable solder paste system.

This paper will show basic alloy and flux properties as well as TCT results comparing the new formulation with SAC305 and Innolot solder pastes in temperature ranges between -40°C and +125°C, as well as +150°C.

When evaluating solder paste for use, mechanical reliability is one feature of interest. The performance of an electronic assembly in a vehicle, for example, may hinge on a solder alloy’s resilience to vibration fatigue. Test standards exist for vibration fatigue, but those are usually meant to test whole assemblies, not individual solder pastes. The purpose of this study is to evaluate solder pastes for BGA use rapidly and in fine resolution, enabling an informed decision when selecting paste for automotive assemblies. In this experiment, three different alloys were evaluated for their vibration resilience using 1mm pitch PBGA256 packages. The flux system and reflow profiles for the three alloys were kept constant. All tests were conducted at ambient temperature. The test vehicle, fixturing system and test regimens developed for the study will be discussed. Results show meaningful differences between the three alloys. Intergranular fatigue fractures within the solder bulk were observed in tests lasting less than 5 hours. Failure mechanisms for lead-free alloys in isothermal vibration will be discussed, with cross-sectional images from this experiment to demonstrate.

For an automotive transmission control unit (TCU) platform, the bottom ground pad of a high power low-profile quad flat package (LQFP) component soldered to the thermal pad of the PCB had a void specification limit of 25% for optimum heat dissipation. This OEM specification must now be implemented in EMS production with high reliability (Cpk 1.67) and high cost effectiveness. Testing with different solder pastes, stencil designs, stencil thicknesses, and an optimized reflow profile in a standard air convection reflow oven still resulted in 11% PCB assembly scrap with LQFP voiding >25% void limit. When soldering was done in vacuum reflow, LQFP solder voiding met the 25% void specification, but the vacuum reflow oven was rejected because of (a) the significantly higher cost of the vacuum oven; (b) reduced throughput due to increased process time [additional time in the vacuum chamber, longer time above liquidus (TAL)]; (c) more floor space needed to accommodate the longer vacuum oven; and (d) process defects such as solder splash and concerns with increased intermetallics due to a longer TAL.

In this study, printed solder paste was replaced by a single flux-coated solder preform that was picked from a tape & reel pocket with a standard production nozzle and placed on the PCB thermal pad. With the flux-coated solder preform, (a) maximum voiding was 1.67; (c) Product Validation (PV) builds for series production achieved a high Cpk > 1.834; and (d) the standard air convection reflow oven could be used with no additional equipment cost.

The research goal was to establish a limit for the number of rework cycles for Ball Gird Arrays (BGAs) and to determine the clearance required between a BGA and its surrounding components on an assembly without impacting the overall Printed Circuit Board (PCB) and Printed Circuit Assembly (PCA) reliability. This project’s test vehicle is comprised of four different sets of layouts, each utilizing a large plastic of 40×40mm (1.6"×1.6") BGA surrounded by various sizes of BGAs—(3×3mm (0.1"×0.1"), 6×6mm (0.2"×0.2"), 6×8mm (0.2"×0.3"), 8×8mm (0.3"×0.3"), 9×9mm (0.4"×0.4"), 11x11mm (0.4"×0.4"), 17×17mm (0.7"×0.7")—placed at various clearances to the center BGA. The surrounding BGAs consist of various pitches, substrate materials, and package sizes, and are placed at specific clearances—1.3mm (50mil), 2mm (75mil), 2.5mm (100 mil), 3.8mm (150mil), 5mm (200mil), 6.4mm (250mil), 7.6mm (300mil), and 10mm (400mil)—away from the center BGA, which is the rework site. Peak temperatures were recorded using thermo-couples at the surrounding components during each rework cycle. Based on the drop shock reliability test results and cross section of microvias, PCAs were still reliable after two rework cycles as failures were not due to fatigue and via structures were still good and fully intact. Thermocouple results showed that a clearance of at least 10.16mm (400mil) is required for reduced effects of secondary reflow [1]. Examples of secondary reflow effects are the risk of increased void percentage (%), solder joint brittleness, hot tear defects, and PCB delamination. However, this may not be favorable to high-density designs. Nevertheless, secondary reflow is inevitable at all adjacent components due to physical proximity. Alternative soldering methods or physical shielding techniques [2] must be deployed for tight spacings; these will require further study.

Repair of soldered components is a constant necessity in the electronics industry. Product performance enhancement, damaged components, and exchange of wrong placed components are some of the motivations behind a repair. Dispensing and placing a 400 µm pitch component manually is very time consuming and could cause collateral damage to the already populated components. A novel automatic repair method and tools with no human interaction were developed. This method uses the advantages of solder jetting and pick and place in one instrument, making it extremely accurate, reliable, and cost-effective. The use of different alloys including low-temperature soldering (LTS) is feasible. The results show that this technique significantly improves the throughput of the repaired devices.