Bio-Based Encapsulation Resins: Good for the Environment, Good for Your Environment

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There is increasing environmental awareness within society, affecting legislation, commerce, and industry. Nature offers an abundance of macromolecules and smaller molecular weight compounds that provide renewable sources for polymers, as opposed to crude oil. These renewable resources make ideal structural backbones for the synthesis of biopolymers, renewable-based monomers, fillers and additives, the key ingredients for polyurethane and epoxy thermoset materials. Research and development to promote innovative solutions that lead to a sustainable economy shows that bio-based materials can deliver a viable alternative to materials derived from crude oil, even in electronic encapsulation applications.

In this study, numerous accelerated life tests have been performed to evaluate the performance of novel bio-based polymers alongside standard synthetic grades. 1000-hour thermal ageing was performed on type IV specimens in accordance with ASTM D638. The tensile strength and elongation were measured before and after high temperature exposure for 100, 500 and 1000 hours to monitor the consistency in physical performance with long term exposure to high temperatures, to determine the maximum operating temperature. Standard B-24 SIR test coupons were coated with a thickness of 19.69mil (500μm) and tested at 185°F (85°C) / 85%RH in line with automotive testing. Surface and Volume Resistivity was measured according to ASTM D257 to determine the impact high temperature and high humidity, and saltwater immersion has on the electrical resistivity. The thermal conductivity was also measured according to ASTM D7984 to understand how the thermal conductivity of biogenic powders compares with commercially available non-renewable sources.

This comparative study concludes that bio-based polymers show superior performance to some synthetic materials without compromise on quality of performance, and that going ‘green’ can deliver performance advantages in underwater applications as well as hot and humid operating environments.

Author(s)
Beth Turner
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Massively Parallel Testing of Panelized Printed Circuit Board Assembly (PCBA)

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The cost of test has always been a main concern in the electronics manufacturing business. The recent proliferation of 5G, Internet of Things (IoTs) is driving the industry with smart devices on consumer products, medical products, industrial, as well as automotive industries. The printed circuit board assembly (PCBA) used is more sophisticated and packed with smaller components that are critical to the functionality of the device. However, the testing of these small boards is still dependent on test systems that were built for simple PCBA from 20 years ago. This may mean sacrificing test coverage in the hope that end-of-line functional testing will be able to catch these critical failures resulting in a lower throughput and increasing cost of test to the manufacturing industry.

The Massively Parallel testing of panelised PCBA will address the needs of the high-volume manufacturing by revolutionizing the throughput of the board test and applying a parallel test time for each board in the panel.

This paper discusses the parallel testing of up to 20 boards in a panel and the lower cost of test that can be achieved with the high throughput capability of the board test system.

The following tests that are tested in parallel are:

1.Open/Short test

2.Analog components test

                a.Resistor, Capacitor, Diode, Zener, transistor, FET, Inductor

3.Vectorless testing

                 a.Integrated Circuit Device, Connectors

4.Flash Programming (Erase, Program, Verify)

5.Voltage measurement

6.Functional test

                  a.CAN/LIN test

                  b.PXI test

The paper will also discuss the following: •Performance of high volume PCBA testing running in parallel

•Methods to increase PCBA test throughput without increasing cost

•Software to maximize the execution of parallel test

Author(s)
Jun Balangue
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Increasing Efficiency of Functional Test Through the Use of Modular Test Components and In-Situ Methods for Cleaning of Test Probes and Electrical Calibration

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Instead of using a dedicated test platform, we are presenting methods of using modular and highly scalable components to perform functional testing on a printed circuit board assembly (PCBA). Functional end of line testing includes various test procedures - one of which involves the use of test fixtures and probes for conducted testing. While it may be tempting to use a dedicated test platform for one purpose, it may be more economical to use a "recyclable" approach where test fixture frames can be reused amongst various programs. This cassette-type approach is presented in this paper. We are also discussing how to easily add or remove components such as side-access mechanisms, pushrods etc. without intensive rework. Another topic of this presentation is the so called "in-situ" method for tasks such as cleaning/preventive maintenance of test probes and electrical calibration (i.e. the removal of unwanted effects which alter the RF/signal behavior of the system). In the past such tasks were pretty cumbersome but with newer technologies it is now possible to quickly manufacture cleaning and calibration aids in the field by using simple yet professional 3D printers. Our goal is to provide a holistic approach when it comes to testing and to reuse as many components as possible for various applications and programs. The idea is to recycle and refurbish without making compromises as far as the reliability of such a setup is concerned. With our contribution, engineers and other decision makers in the test process will learn how to use resources effectively to perform functional testing on their boards.

Author(s)
Matthias Zapatka
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

IPC Lauds Passage of “CHIPS and Science” Act; Electronics Industry Calls for a Holistic Approach to Reviving Domestic Electronics Capabilities

The following statement is issued by John Mitchell, IPC president and CEO, to comment on President Biden’s signature today on the “CHIPS and Science Act” in Washington, D.C.:

“Electronics manufacturers are pleased that this bill has become law, and they welcome the added innovation and resiliency it will bring to the global electronics supply chain. Billions of people will benefit from faster, more secure access to the next-generation technologies that this bill will help to speed to market.

“We are especially pleased that the bill includes at least $2.5 billion for a new National Advanced Packaging Manufacturing Program, which is aimed at making the United States a world leader in the post-Moore’s-Law only era of microelectronics. In the mid-1960s, Intel founder Gordon Moore predicted that the number of transistors that would fit into an integrated circuit would double about every two years, allowing the production of ever more powerful electronic products with greater cost efficiencies. Moore’s Law held true for decades, but today, is dying, and designers are increasingly relying on advancements in the packaging of silicon chips into ever-smaller integrated devices to achieve the greater functionality and efficiencies that they previously realized through silicon scaling. Today, packaging is king, and this legislation will help position the United States as a leader in this crucial technology.  [Read more about advanced packaging in this IPC report.]   

“Most urgently, the United States needs to invest in the development and production of the most advanced integrated circuit (IC) substrates, i.e., circuit board surfaces, for which there are only nascent capabilities domestically. 

“Companies engaged in standing up packaging and IC substrate facilities will have opportunities to tap into U.S. Government funding for R&D, new facilities, and workforce training through the programs funded by this bill. IPC is urging federal officials to structure these initiatives to deliver benefits holistically across the electronics manufacturing industry. Increasing domestic chips production without bolstering related manufacturing capabilities will actually lengthen the semiconductor supply chain, as chips made in California or Ohio will still need to be sent to Taiwan, Japan, or South Korea for packaging and assembly into finished products.

“It’s also important to keep in mind this is only one step in a long journey toward rebuilding the U.S. electronics manufacturing industry. The Executive Branch and Congress must continue to support – through long-term policy and funding – the larger ecosystem that sustains innovative, resilient, and secure electronics manufacturing.”  

For more information, visit www.IPC.org.

Cyber Attack Response Business Continuity Plan: Trying to Make the Incident Response for the Factory

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Today, more than 40% of cyber-attacks target IoT devices, and where attacks themselves are commercialized, it is becoming essential to take countermeasures against cyber-attacks, not only for defense but also for intrusion. Network management tools for such situations have already begun to appear on the market, IT experts are steadily taking measures and Business Continuity Plans (BCP) will be prepared.

Even with that, is important to understand if the factory is okay and if IT experts have considered an entry point from inside the factory.

When it comes to internal intrusion, the factory has its own characteristics, and special preparation is required. The easiest thing to understand is that the suspension of production at the factory is the suspension of shipment, which directly and quickly affects the business. At the factory, it is important to know how to limit potential damage to a limited range and how to recover quickly, which must be accelerated compared to the general approach. This is obvious to everyone involved in production, but IT experts have no way of knowing it.

In the experience of the author, when the production department hears the words "cyber-attack response BCP", they understand that cyber related issues should be taken up by the IT department, so all consideration are left up to the IT experts. As a result, special preparations were not made in consideration of the unique characteristics of the factory. It was therefore decided to strengthen the response later.

This paper, while referring to the actual results of the factory, will logically explain the measures to be taken based on the characteristics of the factory, and logically show the response in the event of a cyber-intrusion. The goals of this paper are to promote more measures for the entire supply chain and to help form the trust of the future electronic manufacturing industry.

Author(s)
Hiroyuki Watanabe
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

IPC APEX Secure Data Exchange Between Design And Manufacturing With IPC-2581 (DPMX) and IPC-2591 (CFX)

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For many years, the focus of the exchange of design and manufacturing data has been related to the reduction of lead-time in getting products to market, with the reduction of design-turns, engineering effort, and the number of inevitable mistakes associated with any manual manipulation of data. Today, the focus shifts to include consideration of security, in the wake of knowledge that sensitive data related to products and manufacturing have been accessed by unauthorized parties, leading to the rapid creation of cloned products, counterfeits, and even devices intended to play a part in a coordinated cyberattack.

At the same time however, there is the need for the extension of the use of data in a growing number of manufacturing automation applications on the shop-floor itself. The challenge is to make more use of data, such that automation of a greater number of engineering processes can be achieved, but in a way that ensures security and safety of the data and its value.

Author(s)
Hemant Shah
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Cyber Security and Export Compliance in the PCB Supply Chain

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What went wrong, when did it happen and what have we learned? How often have we been confronted with these simple and direct words describing a situation where the outcome is undesirable! To address and understand the challenges and opportunities of export compliance in the PCB supply chain, one must first recognize and understand the underlying causes for the current situation. Or put simply, it is practically impossible to fix something, if you do not know what the problem is! This paper will address the opportunities cyber security and export compliance will bring to the actors in the PCB supply chain. It will also explain why the cost of these measurements are practically insignificant compared to the security, stability and long-term profitable commitment they will ensure.

Author(s)
Didrik Bech
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

PFAS Chemistries and Materials: Their Essential Uses in Semiconductor and Electronic System Manufacturing, Pending Regulatory Restrictions, and an Electronics Industry Call to Action

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Per- and polyfluoroalkyl substances (PFAS) is a class of fluoro-organic materials that is both ubiquitous and essential to the semiconductor manufacturing process as well as the downstream consumer electronics that semiconductors are incorporated into. PFAS and PFAS-containing articles are receiving unprecedented regulatory attention and are likely to be restricted to an end point of a ban of all non-essential uses. This presentation aims to provide an overview of these impending PFAS regulatory restrictions, how they are likely to impact the semiconductor and electronic system manufacturing industries, the strategies in place for identifying and justifying our ongoing essential uses, and a call to action for active participation within IPC and other appropriate electronics industry associations to create aligned industry voices and to ensure effective regulatory engagement strategies and control mechanisms going forward.

Author(s)
Kevin Wolfe
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Eco-design for a Circular Economy: Best Practices in the Electronics Industry

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In this paper, we highlight the best practices for eco-design in electronics as presented during a multi-part learning series. The learning series was established as an interactive webinar-based experience in which eco-design leaders showcase their thought processes, strategies, successes, and failures in pursuing eco-design goals. This paper is intended for those who have experience in the design of electronics, are familiar with the concept and principles of eco-design, and are interested in advancing eco-design in their companies and their products. The learning series project stems from the work of the Sustainable Electronics Technology Integration Group at iNEMI, a group of electronics industry professionals that see that sustainability of the elec-tronics sector can be advanced by increasing circular product life cycles. How to implement circularity by design is a complex undertaking as it requires not only the right mindset, but tools to assess product life cycles, engineering skills to redesign products, engagement of the supply chain and ultimately also dealing with numerous constraints and risks. Therefore, this eco-design learning series aimed to identify a range of best practices in eco-design for a circular electronics economy. We covered industry segments including information and communications technology (ICT) infrastructure equipment, energy conversion and distribution components, automation technology and consumer products. We learned that the strategic approaches are manifold, and examples comprise better repairability enabled by a modular design, repurposing of smartphones at end of first life, increasing recycled material content (including both, post-industrial and post-consumer recycled material), shrinking pack-aging volumes by optimised design and by unbundling devices and accessories. Some of the main identified drivers for circular design are brand reputation, market demand and the implementation of new business models, but also policy developments. In some instances, there are sustainability trade-offs which must be considered, such as continuous progress in energy efficiency of network equipment, which leads to the insight that replacing network equipment from time to time lowers overall environ-mental impacts and that maximizing product lifetime may not always be an ideal strategy. A common approach is to base circular design on a thorough assessment of the environmental impacts over the full product lifecycle. A Life Cycle Assessment approach has been implemented by most of the leading companies in terms of eco-design, in some cases coupled with communicating environmental profiles through Environmental Product Declarations to provide some transparency for clients. Such an LCA approach works for small companies with only one product on the market, but also for larger players with a broad product portfolio.

Author(s)
Karsten Schischke, Julio Vargas, Mark Schaffer, Thomas A. Okrasinski, Grace O’Malley, Sanghoon Lee, Kelly Scanlon,
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

SMT Assembly of LGA Components and SMT Rework with Low Temperature Solder Alloy

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Low Temperature Solder (LTS) is increasingly being used as a replacement for SAC305 solder alloy. Processing with LTS can reduce energy costs and impact on the environment while also reducing PCBA exposure to elevated temperatures, potentially reducing CTE mismatch stresses between PCBA and components and enhancing assembly reliability. Large BGA and LGA components are now being mounted with LTS. However, the low temperatures of the processes create numerous process challenges that are not experienced with SAC305, such as reduced effectiveness of flux during reflow. A study was conducted to better understand how process variables affect LGA solder joint formation. The effects of the type of LTS solder alloy, the stencil aperture geometry and thickness, and reflow profile on the quality of LTS LGA solder joints were examined. It was observed that solder joint quality is highly sensitive to solder volume and the flux and solder alloy combination that is used. Additionally, in conjunction with this study, work has been done on rework and touchup using LTS wire. One of the challenges is getting the wire supplied in spools due to the alloy’s brittle nature. To date, only one vendor has been able to provide LTS wire in a spool.

Keywords: Bismuth, Tin, LTS, SMT, Paste, Low Temp Solder, LGA, Rework

Author(s)
M. Burmeister, D. Geiger
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022