Recently new semi-aqueous in-line cleaning machines (CM) were installed; however, the associated increased volumes of circuit card assemblies (CCAs) being cleaned after SMT surface mount technology assembly resulted in correspondingly more solder paste residue or “goo” building-up on cleaning machine wash / rinse tank surfaces and “gumming-up” sump-pumps, causing sensor failures and interrupting production. Moreover, what remains is very stubborn to remove during preventative maintenance (PM). This goo is attributed to the presence of a plasticizer or flux softening additive in the current solder paste, which is not very soluble in cleaning solutions, and which further concentrates in the non-volatile residues (NVR) or % solids that precipitate / accumulate on cooler surfaces, rather than rinsing away with the other flux constituents. The “no-clean” solder pastes initially used by commercial industry attributed excessive electrical probe test contact fails from the “hard” flux residues remaining on the test pads, since the no-clean solder pastes are not cleaned or removed from the test pads. As a result, a rubber-based softening agent was added to render the flux residue on test pads more probe penetrable for electrical testing. Conversely, the current manufacturing site cleans-off the “no-clean” solder paste flux residue required for subsequent conformal coating adherence for aerospace / defense applications, and therefore does not need a softened flux residue for probing, since the flux residue is cleaned-off the test pads before electrical testing. Solder pastes with and without the softening agent were comparatively evaluated for effects on solder paste volume printed and solder solidified after reflow, ionic cleanliness, solder-joint shear strength, microstructure, IMC intermetallic thicknesses and viscosity on test vehicles and production products.

Traditional Subtractive Etch (SE) processes used to manufacture Printed Circuit Boards (PCBs) are adequate for many of today’s circuit designs. However, certain parts of PCBs, and more generally, certain PCBs in their entirety, are reaching the lower limits of signal conductor line widths and spaces. Today, these dimensions are typically 75 μm / 75 μm (3 mils / 3 mils). New Semi-Additive Process (SAP) technologies can reach much smaller pitches, typically 25 μm trace plus 25 μm space (1 mil / 1 mil) and below. Because the design step precedes manufacturing, this paper will explore the unique challenges associated with designing for SAP fabrication and offers a framework for maximizing benefits. In a specific example, new SAP design guidelines have been applied to the layout of a reference design for a DDR4 SODIMM module. Benefits include: (i) narrowing the trace pitch to route more traces through the Ball Grid Array (BGA) patterns, (ii) reducing the number of layers, and (iii) decreasing the number of microvias. These efforts result in lower costs due to decreased board size and a lower layer count with fewer lamination cycles. Moreover, these modifications collectively should achieve higher reliability. The SAP layers may be combined with SE layers to build a single board. Examples will be shown in the DDR4 memory layout where the two processes can be used. This case study represents a natural first step in the transition to using new SAP technologies in next-generation PCB electronics.

This paper will discuss the evolution of the printed board design to date, how process improvements and new manufacturing technologies and chemistry have enabled the new step down in miniaturization. Herein will be described as the new Ultra High-Density Interconnect (Ultra HDI) product features and include design guidelines, design parameters, performance tolerances, test requirements and end user requirements for the final printed board.IPC has assigned Task Group D-33-AP to develop a guideline for the Ultra HDI level of printed boards, and the result of the D-33-AP activity will be the incorporation of new IPC standards for the design, performance, and acceptability of Ultra High Density printed boards.

This paper will discuss the difference between traditional advanced any layer HDI PCB with subtractive process and Ultra High-Density Interconnect (Ultra HDI) or substrate-like-PCB (SLP) with modified Semi-Additive Process (mSAP). The paper will explain the major market drivers for ultra HDI/SLP and the boundaries of each technology used to form fine conductors. The process flow difference and major manufacturing equipment used to manufacture the Ultra HDI/SLP will be discussed. The major design related considerations to use Ultra HDI/SLP technology and how normal advanced any layer HDI and Ultra HDI/SLP compare in terms of capability, reliability, and cost.

Complex geometries, customized parts and new processes; these are characteristics that are readily associated with additive manufacturing (AM). At the same time, they are often associated with high hurdles in terms of mass production, suitability for series production and reliability. The use of AM is already widespread in industries such as mechanical engineering, aerospace, automotive and medical technology.

What is the situation in the field of "classic" electronics and electronics manufacturing? Here, too, there are initial areas of application suitable for mass production and promising processes. Substrates for electronics are usually "multimaterial systems" (conductive & non-conductive). Appropriate printing systems and printers are today available, eCAD tools and data formats not.

Multilevel Additively Manufactured (AME) circuits and devices have been enabling circuit design and implementation that is not possible or is very expensive using traditional methods such as PCB production. This has been driven by the unique capabilities that the digital nature of AME technology brings to the electronics design and manufacturing industry: Freedom of form factor in the 3D structure of the circuits that can include built-in passives and embedded ICs.

This presentation will discuss not only the advances in design, manufacturing, and characterization of circuits and devices based on AME technology, but also the impact on the electronics packaging and System in a Package (SiP) devices. AME takes advantage of its digital nature to create any shape for the electronic circuit board with any number of interconnected levels with dielectric material between them. These structures typically have dimensions in x, y, and z with values that need to be controlled within a few microns, to 200 microns, to millimeters. Therefore, the dielectric, metal traces, and in-circuit components are electrically characterized only after the manufacturing step is completed and not layer by layer. Thus, the substrate, electrical devices, and component mounting has become more interrelated as an integral part of a complete functional device being fabricated in a single system as compared to the traditional analog PCB processes. For this, new test technologies need to be implemented. Examples of functional AME circuits and devices will be shown inclusive of transformers, RF devices in the GHz range, multipole/multilevel RF antennas, in circuits as well as inserted components, and other devices.

Surface mounted passive electrical components are beginning to reach hard limits for further reduction in size of their packages. Performance of the raw materials used have set capabilities for their volumes. Additionally, 01005 components are already small enough to pose difficulty in pick and place operations. For further volume reduction of PCB scale electronics, fundamental innovations to PCB construction are required. We have approached this challenge by using Direct Digital Manufacturing (DDM) to forgo planar PCB designs for Printed Circuit Structures (PCS). Volumetric savings have been achieved by developing a methodology to embed circuitry into the curved walls of a cylindrical structure, which turns the device into a Printed Circuit Cylinder (PCC).

The PCC process uses techniques from flat additively manufactured circuits, including Fused Deposition Modeling (FDM) to create dielectric and support structures, Direct Print (DP) of conductive pastes to form traces, and surface milling to guarantee smooth substrates for those traces. From this point, the cylindrical methodology was developed. Software was written to convert flat print files into rotational ones, with the cylindrical workpiece rotating under the DDM tool plate. A subtractive milling program was written to embed components into the cylindrical surface by means of high-tolerance cavities. A new method of DDM interconnects was devised to make seamless thresholds for interconnects between the embedded QFN chips and the adjacent board.

These advancements together enabled the fabrication of a functional PCC with a suite of sensors and Bluetooth communication. The on-board sensors include acoustic, optical, and motion, and transmit that information to a Bluetooth connected device. The circuits have been fabricated reliably in quantity and are rugged enough to survive impulses up to 2000 G’s. These PCCs are the first step in the development of fully conformal electronics, and they create opportunities for volumetric savings in aerospace, munitions, and wearable applications.

Thermal management must advance with the military’s requirements for increased performance, lower costs, and rapid technology changes. Combining multiphysics analysis and additive manufacturing optimizes the cost, weight, and performance objectives using validated models and advanced fabrication techniques. Thermal solutions that meet the complex requirements of the military must be incorporated early in the design process to preemptively address challenges using a system-level approach.

This paper compares the benefits of single-phase and two-phase cooling in high-power applications. Novel additively manufactured designs were examined and experimentally tested to validate the multiphysics models. Best practice guidance will be shared.

Structural electronics enables design innovation by adding electronic functions to smart surfaces with 3-dimensional form factors. This paper describes the making of a structural electronics technology demonstrator that uses polypropylene (PP) film and injection molding (IM) resin. In the past, the company has used mostly polycarbonate (PC) materials. The change from PC films to PP film also affects surface mounting. This project showed that polypropylene materials are suitable for structural electronics. However, more work is needed to optimize manufacturing. For example, the team needs to find surface mounting adhesives with shorter cure times at temperatures of 80 °C or lower.

Stretchable electronics is a new innovation and becoming popular in various fields, especially in the health care sector. Since stretchable electronics use less Printed Circuit Boards (PCBs) it is expected that the environmental performance of a stretchable electronics-based device is better than a rigid electronics-based device that provides the same functionalities. The main purpose of this research is to perform a comparative life cycle analysis (LCA) of stretchable and rigid electronics-based devices. The LCA results show that the stretchable cardiac monitoring device has better environmental performance in all eighteen impact categories. This research also shows that the manufacturing process of stretchable electronics has lower environmental impacts than those for rigid electronics. The main reasons for the improved environmental performance of stretchable electronics are lower consumption of raw material as well as decreased energy consumption during manufacturing.

Keywords: Life Cycle Assessment, Stretchable Electronics, Printed Circuit Board, Cardiac Monitoring Device, Electrical and Electronic Equipment