Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wire bond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss was due to nodules and scratches on the wire bonding pads.

The PCB manufacturer attempted to eliminate nodules and scratches. First, a light scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire bonding pad, the board was still considered a reject. In order to reduce scratches on wire bonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable.

Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches, and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to find out the effects of nodules and scratches on wire bonds. The dimension of nodules including height, and the size of scratches including width were measured prior to wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds were conducted using wire pull tests before and after reliability test. Based on the results of the wire bonding evaluation, the internal specification for nodules and scratches for wire bondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation, compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.

This paper examines the development and classification of flexible and stretchable conductive pathways to carry power and data and details the technical challenges as well as the methodologies deployed to develop a robust and commercial solution. Along with the technological advancements in the last 20 years, there has been a marked growth in the functional needs to be added to apparel. Market demand today is creating a new and evolving need for soft good integrations into a portfolio of product categories, creating with it the need to develop soft circuitry and connectivity technologies applicable to apparel/textile form, without limiting the traditional textile properties. Key to this is the capability to develop suitably specified conductive pathways whilst retaining properties such as stretch, bend, drape, breathability and offer fabric like appearance in a cost effective and sustainable manner. Herein, reviewed is the mass manufacturing of narrow fabrics and bondable data lines with the capability in transferring data from low frequencies(KHz range) to extremely high frequencies (GHz range); conductive path resistances that can range from a few ohms per meter to tens of milliohms per meter; along with stretch-ability of up to and beyond 100%. Also discussed are the methods for testing and validating these conductive circuitries including laundering, mechanical and environmental reliability; and the classification of the conductive circuitry methodologies based on the e-textile applications that can make most use of different attributes of these methods.

The advent of electronic materials with the potential to undergo extreme deformation while maintaining conductivity has led to the development of advanced stretchable electronic systems. These systems have applications in vital industries ranging from consumer products to medicine and defense. Of interest are flexible, stretchable, wearable electronic (FSWE) systems that employ flexible and/or stretchable substrates, conductive materials, dielectrics, etc., to achieve the requisite flexibility and stretchability to conform to complex shapes. Thus, there is a need to quantify the mechanical and electrical performance and reliability of FSWE devices under such deformed use-case loading conditions. Several mechanical tests have been developed by various researchers to understand the performance and reliability of such devices under stretching, bending, twisting, and folding conditions. In this paper, a different mechanical test method is discussed in which a printed element on a thermoplastic polyurethane (TPU) substrate is mounted onto an inflatable bladder of known geometry to induce multiaxial strains and the in-situ electrical resistance of the printed element is measured during inflation. This test will hereafter be referred to as the Bladder Inflation Stretch test for FSWE devices, or the BIS test. Stretchable screen-printed silver ink traces cured onto TPU is chosen in this study due to its common use in wearable devices. A bladder geometry with variable radii of curvature is employed to simulate a variety of anthropomorphic geometries (i.e. the flexure of a bicep, the bending of a knee, etc.). Both monotonic and cyclic loading regimes are employed to determine electrical resistance change of a Serpentine and a Spiral printed trace. The measured electrical resistance values are compared against the data available in open literature.  Recommendations are made for extending the BIS test set up to study other phenomena related to the reliability of wearable electronics.

The paper will discuss the integration of 3D printing and inkjet printing fabrication technologies for microwave and millimeter-wave applications. With the recent advancements in 3D and inkjet printing technology, achieving resolution down to 50 um, it is feasible to fabricate electronic components and antennas operating in the millimeter-wave regime. The nature of additive manufacturing allows designers to create custom components and devices for specialized applications and provides an excellent and inexpensive way of prototyping electronic designs. The combination of multiple printable materials enables the vertical integration of conductive, dielectric, and semi-conductive materials which are the fundamental components of passive and active circuit elements such as inductors, capacitors, diodes, and transistors. Also, the on-demand manner of printing can eliminate the use of subtractive fabrication processes, which are necessary for conventional micro-fabrication processes such as photolithography, and drastically reduce the cost and material waste of fabrication. The utilization of 3D and inkjet printing to fabricate integrated circuits interconnects and antennas is an interesting avenue for research due to the customized nature of certain applications such as automotive radar and 5G wireless solutions. This paper will explore different ways of interfacing with monolithic microwave integrated circuits (MMICs) using additive manufacturing methods including printed vias, ramp interconnects, and wire bonds. With these structures, microwave properties such as matching and losses can be improved due to the ease of printing tailored interfaces that match with each individual device. It will also include demonstration of fully additively-manufactured antennas exhibiting excellent bandwidth and circular polarization, something that is expensive and difficult to achieve with traditional manufacturing methods. Finally, the paper will also introduce future directions for additively-manufactured electronics, including the packaging of high-power devices, cooling functionality, and using exotic materials for electromagnetic interference shielding and flexibility.

Many different final plated finishes are used in the PCB industry, each with its own influence on insertion loss. The impact of an applied finish on insertion loss is generally dependent upon frequency, circuit thickness, and design configuration. This paper will evaluate the effects of final plated finishes on the insertion loss of two popular high-frequency circuit design configurations, microstrip transmission- line circuits and grounded coplanar-waveguide (GCPW) transmission-line circuits. Data will be presented for loss versus frequency for six different plated finishes commonly used in the PCB industry, and opinions will be offered as to why the loss behavior differs for the different plated finishes and for the different circuit configurations. Because the insertion loss of high-frequency circuits is also dependent upon substrate thickness, circuits fabricated on substrates with different thicknesses will be evaluated to analyze the effects of substrate thickness on insertion loss using different plated thicknesses.

This report will also explore many different aspects of final plated finishes on PCB performance. The nickel thickness in electroless-nickel-immersion-gold (ENIG) finishes normally has some variations; data will show the effects of these variations on the RF performance of a PCB. Immersion tin is often used to minimize thickness variations and analysis will show the effects on RF performance for different thicknesses of immersion tin. The effects of plated finish on PCB performance can vary widely over frequency, and those effects will be shown for a wide range of frequencies, from 1 to 100 GHz.

Conventional Electroless Nickel/Immersion Gold (ENIG) currently available in the market is prone to brittle solder joints failures. Due to these reasons, there are field failures and reliability concerns of electronic assemblies - component disconnection which lead to overall malfunction of electronic assemblies. The novel ENIG achieves robust solder joints and provides improved quality and reliability of electronic assembly. Also, it uses cyanide-free chemistry for the immersion gold process making it eco-friendly. This allows manufacturers to consume eco-friendly product while avoiding major field failures and resulting consequences.

With conventional ENIG, the immersion gold process operates on galvanic displacement process (displacing Ni atoms by Au atoms). If not controlled properly, the displacement can be aggressive leading to Ni corrosion, commonly known as “black pad” or hyper-corrosion of Ni. This leads to brittle solder joints failures. Also, during the reflow process the gold layer dissolves into solder and intermetallics form between tin and nickel. In conventional ENIG intermetallics, too much nickel diffuses into tin leaving behind soft Ni3P layer at the interface. This soft layer is responsible for brittle solder joint failures. The novel ENIG employs an interfacial engineering approach which leads to 10X corrosion resistance of Ni surface helping to prevent black pad/hyper-corrosion. Also, it creates a barrier for Ni atoms to diffuse too much in tin forming distinct-thin intermetallics which are robust and eliminates brittle solder joints failures. Ball Shear and Ball Pull tests (Industry Standard Based testing: JESD22-B115 and JESD22-B117) have been conducted after (1, 3 and 6) reflow cycles during the soldering process. Also, as a part of simulating aging and evaluating long term reliability of solder joints/electronic assemblies, samples were subjected to 150°C for 500 hours and 1000 hours before conducting Ball shear test and Ball Pull test. The novel ENIG board surface finish achieves robust solder joints for better reliability of electronic assemblies.

The majority of flexible circuits are made by patterning copper metal that is laminated to a flexible substrate, which is usually polyimide film of varying thickness. An increasingly popular method to meet the need for lower cost circuitry is the use of aluminum on Polyester (Al-PET) substrates. This material is gaining popularity and has found wide use in RFID tags, low-cost LED lighting and other single-layer circuits. However, both aluminum and PET have their own constraints and require special processing to make finished circuits. Aluminum is not easy to solder components to at low temperatures and PET cannot withstand high temperatures. Soldering to these materials requires either an additional surface treatment or the use of conductive epoxy to attach components. Surface treatment of aluminum includes the likes of Electroless Nickel Immersion Gold plating (ENIG), which is extensive wet-chemistry and cost-prohibitive for mass adoption. Conductive adhesives, including Anisotropic Conductive Paste (ACP), are another alternate to soldering components. These result in component-substrate interfaces that are inferior to conventional solders in terms of performance and reliability. An advanced surface treatment technology will be presented that addresses all these constraints. Once applied on Aluminum surfaces using conventional printing techniques such as screen, stencil, etc., it is cured thermally in a convection oven at low temperatures. This surface treatment is non-conductive. To attach a component, a solder bump on the component or solder printed on the treated pad is needed before placing the component. The Aluminum circuit will pass through a reflow oven, as is commonly done in PCB manufacturing. This allows for the formation of a true metal to metal bond between the solder and the aluminum on the pads. This process paves the way for large scale, low cost manufacturing of Al-PET circuits. We will alsodiscuss details of the process used to make functional aluminum circuits, study the resultant solder-aluminum bond, shear results and SEM/ EDS analysis.