With the global progress of the electrification in the automotive world, the number of applications with high voltage is increasing, as well as the level of the voltage itself. Many companies in the automotive supply chain are getting involved and are developing technologies and products with high voltage on the PCBs. This means on one side that the likeliness to have failures is growing, but also on the other side the industrywide know-how in designing and manufacturing reliable high voltage PCBs is increasing.
High voltage can induce failures in a PCB, for example by anodic migration, partial discharge or changes in the material caused by the high electric field strength. Shorting pathways can grow over time in the bulk FR4 material where initially no obvious migration path has been present, which may lead to circuit shorts over time while the PCB is in operation.
This paper collects case studies in the industry and shows an overview of technologies, materials and design rules how to avoid high voltage induced failures. Typical elements to improve the robustness of a PCB towards high voltage are the distance between copper traces, the base material and certain manufacturing process variations.
The goal of this paper is to shed more light on potential failure mechanisms, which are not fully understood and list a catalogue of recommendations which may end up as an industrywide specification or design rule and discuss options for test vehicles to identify a potential issue.

A novel mixed-alloy solder paste IHR, has been developed to enable low voiding in soldering processes while maintaining high-reliability (Hi-Rel) thermal cycling performance. During reflow, multiple types of alloy powders in the mixed-alloy system are used to achieve different results: one type is used to facilitate good wetting, while another type enhances the strength and durability of the final solder joint.[1] The current mixed-alloy paste is designed for applications that require extended thermal cycling life (e.g., -40°C to 125°C) beyond the capabilities of the traditional Pb-free alloys, such as automotive, high-performance computing, and 5G communication. However, most commercial Hi-Rel solder pastes exhibit high voiding compared to the traditional SnAgCu (SAC) alloys, even though their TCT reliability is superior.
This mixed-alloy solder paste demonstrated full compatibility with the SMT process used for traditional SAC solder paste. It exhibited lower voiding and superior TCT performance than both SAC305 and a SnAgCuSbBiNi Hi-Rel alloy.[1] This paper summarizes the attempt on voiding reduction with the mixed-alloy paste via the optimization of both the reflow profile and flux formulation. Both Cu Organic Solderability Preservative (Cu-OSP) and immersion-tin (Im-Sn) surface finishes were used. During this process, voiding results were compared to a standard SAC305 (Sn96.5/Ag3.0/Cu0.5) solder paste. The mixed-alloy paste achieved voiding rates as low as 12.5%, utilizing the daisy-chained QFN68 component (10 x 10 mm package size and 8 x 8 mm thermal pad) to obtain statistically lower results than SAC305. This low-voiding result validates the design of the mixed-alloy solder paste and demonstrates that the optimization of reflow profiles further enables even lower voiding results.
Keywords: Lead-free, IHR, high-reliability, solder, low void

The environmental impact of printed circuit boards (PCBs) is a growing concern due to the rapid increase of electronics integration in everyday life objects, resulting in a significant increase in global electronic waste (E-waste). To reduce the environmental impact of PCBs, a promising solution is to replace standard subtractive manufacturing by additive printing manufacturing. The use of printing techniques reduces the raw material usage and the energy / chemical consumption. Moreover, their low thermal budget and low chemical usage, allow printing on various types of rigid and flexible substrates including recyclable and bio-based polymers. To be a valid candidate for PCB manufacturing, printed technologies must allow a similar degree of complexity in terms of design rules (e.g., number of layers, resolution, etc.) and performances of the final circuit compared with conventional manufacturing technologies. This work presents the challenges related to printed PCB (P-PCB) manufacturing, from design to fabrication and testing. A 4-metal layer P-PCB, including more than a 100 through-hole vias, 88 components, and double-sided assembly, is fabricated using screen printing at pilot scale (32 x 38 cm²). Different substrates are tested and compared in terms of overall performances. A fully functional flexible P-PCB including radio frequency (RF) communication, temperature sensors and LEDs is successfully demonstrated.

Across most, if not all electronics applications, there has been a continual drive to increase complexity while reducing size, weight and power consumption. In order to achieve this, there has been significant pressure on the PCB industry to minimize feature sizes wherever possible, while maintaining high volume and cost effective processes. Rising to this challenge, there has been significant efforts made over recent years to adapt techniques common to the IC packaging sector and apply them into “traditional” High Density Interconnect (HDI) PCB manufacture, thus moving from HDI to “advanced HDI”
While there is little, if any, need for the full Semi Additive Process (SAP) to be applied in many applications, there have been two sub divisions of SAP developed which are relevant when looking to move into advanced HDI PCB manufacture. The modified SAP (mSAP) and advanced modified SAP (amSAP) approaches are combinations of the subtractive HDI and additive SAP techniques which readily open up the technology window and allow a decrease in feature size while still remaining similar to the existing HDI approach.
This paper compares all four of the techniques and identifies the technology level available through each before focusing on those most relevant to advanced HDI manufacture where we then discuss some of the challenges they present as well as offering potential solutions.

For high reliability applications in the HDI and Package Substrate industry the electroless nickel/electroless palladium/immersion gold (ENEPIG) finish provides a reliable solderable and wire bond-capable surface. One aspect where ENEPIG is at a disadvantage compared to other surface finishes is the higher price due to the precious metal use. Besides that, the Pd-plating solution are known to be sensitive to handling conditions and the process robustness is more critical than for other final finishing processes. In this study a new type of Pd-electrolyte for pure-Pd deposits is investigated, which operates with a low Pd-content and which, based to its formulation is more stable and less sensitive to precious metal plate out. The savings related to the reduced precious metal content and the associated reduced drag out losses are significant and could be confirmed in high volume PCB manufacturing. The study shows that the improved electrolyte stability and related reduced need for maintenance result in a reduction of the overall ENEPIG process cost. Beside the consumption data collected at a PCB shop, various tests have been conducted to compare the performance of the ENEPIG deposit with the reference processes being present in the market over the recent 20 years. The new Pd-finish is compared and rated against the existing Pure Pd and Pd-P finishes in regard to crystal structure, intermetallic compound, and reliability to provide a fair 1:1 comparison on the current solutions for electroless Pd-plating.

The economic and environmental implications of electronic component salvage and reuse are increasingly significant in the context of rising semiconductor and artificial intelligence chip costs and sustainability concerns. This paper explores the feasibility and benefits of salvaging and reconditioning the leads and pads of electronic components, focusing on high-value components such as microprocessors, microcontrollers, and artificial intelligence chips. The paper will cover key steps, including selective removal of soldered components, reconditioning of component leads, pins, and pads, marking of harvested components to provide tracking and traceability, and finally, the repackaging for use with automated circuit board assembly equipment.
This study will evaluate the costs involved to allow for a comparison with the use of newly fabricated components, highlighting potential savings in materials and energy. Salvaged components significantly reduce costs associated with new microprocessor production. In addition to economic advantages, salvaging offers considerable environmental benefits. It mitigates the energy-intensive processes associated with new chip fabrication and reduces the need for costly ultra-purified water, a critical resource in semiconductor manufacturing. By extending the lifecycle of electronic components, salvage and reuse contribute to a more sustainable electronics industry, aligning with broader environmental goals. This paper provides a comprehensive analysis of the processes, costs, and benefits, underscoring the viability of electronic component reclamation as both a cost-saving and environmentally responsible practice.

The use of low-temperature (LT) solder alloys in wave soldering applications has remained largely unutilized, despite their potential benefits in reducing energy consumption and material costs. This study evaluates the performance of a SnBi-based LT alloy in wave soldering comparing various components and thermal profiles. The primary objectives include assessing the alloy’s wetting behavior at lower temperatures, its compatibility with existing wave soldering equipment, and soldering performance with existing fluxes. Tests were conducted with careful examination of thermal profiles, wetting performance, and overall solder joint quality. This investigation provides insight into the practical application of a select LT alloy in wave soldering, offering PCB assemblers information into their potential for broader use in the electronics manufacturing industry.

This paper introduces a newly developed flux technology compatible with formic acid reduction reflow ovens which offers solutions to the issues associated with conventional power device soldering. In power device soldering, solder paste with rosin-based flux used in the surface mount technology (SMT) field or solder preforms which use formic acid reduction reflow ovens have widely been adopted. However, these soldering materials have their own downside, and the demand for a new soldering material for power device soldering has increased. This newly developed flux has been designed with a focus on maximizing the reduction performance of the formic acid while utilizing the advantage of the formic acid reduction reflow oven which has been widely accepted in power device manufacturing. This newly developed flux contains heat resistant agents which bond solder powders in the preheat process to ensure the space among the solder powders and promotes formic acid penetration. This effect can be performed regardless of the solder powder grain size; with good solder meltability and wettability obtained. In addition, all flux constituents evaporate below the reflow peak temperature of typical lead-free solders and leave no flux residue on the board. Solder paste containing the present flux has stable print characteristics and can be used in continuous printing without any issue, so that it can be used just like a solder paste containing a rosin-based flux. Furthermore, by leaving no flux residue, reflowed product can proceed to the next process step of power device manufacturing, such as wire bonding or potting without cleaning the flux residue, and the quality of the assembled product is comparable to the solder joints obtained using solder preforms.

Chemical failures in electronics are typically the result of interactions between materials and their environment. Contaminants can originate from manufacturing processes, such as No-Clean flux residues, partially cleaned flux residues, and wash fluids not thoroughly rinsed during cleaning. These contaminants interact with their environment, leading to the deterioration of components and ultimately causing system malfunctions.
The flux within solder paste plays a critical role in the soldering process by removing oxides from metal surfaces and improving solder wetting. However, the activity level of the flux residue left behind after reflowing can cause a reliability concern. Highly active flux residues can be corrosive, leading to long-term reliability issues such as corrosion and dendritic growth if not properly cleaned. On the other hand, low-activity flux residues may be less corrosive but can still pose risks if not entirely removed, especially in high-reliability applications.
Cleanability is another crucial factor when selecting a solder paste and selective flux. After the soldering process, residues left behind by the flux may need to be removed to ensure the assembly's reliability. If the residues are not adequately cleaned, they can lead to various problems, including electrical leakage, corrosion, and even short circuits.
Testing methodologies, such as Surface Insulation Resistance (SIR), Ion Chromatography (IC), and Localized Extraction testing, are designed to identify potential failure points and ensure electronic systems can withstand the challenges of different environments. This research paper will provide insight into the effects of process contamination and the use of these methods to qualify the assembly process.

This paper presents the 3D X-ray of fine-pitch ball grid array (FPBGA) assemblies at steps from hot to cryogenic temperatures to determine deformation behavior of the individual balls with temperatures. Characterization of deformation adds significant value and is critical for verification of analytical modeling and projection of fatigue life under thermal cycling. The cryogenic thermal cycle (–105℃ to +40℃) vs commercial (–40℃ to +105℃) behavior of the FPGA assemblies were presented at the IPC-APEX2024. As part of the investigation, non-destructive and destructive failure analyses were performed for Core Thin Ball Grid Array with 228 balls (CTBGA2028). It was shown that destructive dye and pry better narrowed partial and full cracking when compared to 3D X-ray at the currently achieved voxel size. A summary of the 3D X-rays and dye and pry with new images are first presented.
In addition, four of these components were examined with Environmental Computed Tomography X-ray (ECTX) at temperatures ranging from +105ºC to –105ºC. A CTBA228 atter 3,000 cycles was subjected to ECTX for a detailed analysis and visualization of internal warpage due to temperature changes, specifically visualization of the solder ball grid array. Comparison visualizations narrowed the outward/inward deformations in microns (μm) relative to RT at +105ºC/–105℃, which were pronounced at the corner balls. Their shapes and values from the ECTX evaluation are presented in detail. Under discussion, the experimental findings were compared to a simple analysis to explain the observed outward/inward deformations and project their shift values. Results are compared to limited literature data, which is required to extrapolate to –105℃.
Keywords: X ray, 3D X-ray, Environmental Computer Tomography, Ball grid array, BGA, FPBGA, CTBGA 228, tin-lead solder, SnPb, cryogenic, thermal cycle, solder joint reliability