Innovative Electroplating Processes for IC Substrates - Via Fill,Through Hole Fill and Embedded Trench Fill

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In this era of electronics miniaturization,high yield and low cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate,the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µm,whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade,the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has createdunique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology,the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity,trace/via top planarity,which measures how flat the top of the traces and vias area few major features. This is especially important in multilayer processing,as nonuniformity on a lower layer can be transferred to successive layers,disrupting the device design with catastrophic consequences such as short circuits. Additionally,a non-planar surface could also result in signal transmission loss by distortion of the connecting points,like vias and traces. Therefore,plating solutions that provide a uniform,planar profile without any special post treatment are quite desirable.
Here we discuss innovative additive packages for direct-current copper electroplating specifically for IC substrates with capabilities such as embedded trench fill and simultaneous through hole plating and via filling with enhanced pattern plate.
These new solutions not only offer better trace profile,but also deliver via fill and through hole plating. Here we describe two electrolytic copper plating processes,the selection of which could be based on the via size and the dimple requirements of the application. Process I offers great via fill for deeper vias up to 80 – 120 µm diameter and 50 – 100 µm deep. Process II is more suitable for shallow smaller vias 50 – 75 µm diameter and 30 – 50 µm deep. In this paper we show that these two processes provide excellent surface uniformity and trace profile while also providing via filling and through hole plating capabilities when controlled within given parameters. Process optimization and thermal and physical characterization of the metallization is also presented.

Author(s)
Saminda Dharmarathna,Sy Maddux,Chao Benjamin,Ivan Li,William Bowerman,Kesheng Feng,Jim Watkowski
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Filling of Microvias and Through Holes by Electrolytic Copper Plating - Current Status and Future Outlook

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The electronics industry is further progressing in terms of smaller,faster,smarter and more efficient electronic devices. This continuous evolving environment caused the development on various electrolytic copper processes for different applications over the past several decades.
There are 4 main drivers which forced the chemical supply industry to introduce new electrolytic copper processes with the new feature of “filling” capability over the years. The 1st driver is the continuous miniaturization of electronics. The first blind microvias were introduced with HDI technology in the late 1980s and early 1990s. In 1996,the IC Substrate market started to fill the micro vias. “Plugging” technologies were introduced in order to stack the micro vias to save space or to create “via in Pad” structures. This “plugging” technology with conductive paste was very expensive because of the additional process steps required.
Today copper filled microvias are the standard for almost all HDI PCB manufacturers. The 2nd driver is the thermal management on a substrate. Solutions were needed to integrate features with high thermal conductivity to manage the heat transfer on the substrates from one side to the other in order to minimize hot spots on the electronic devices over a lifetime. The higher the chip performance is,the more it tends to generate local heat-spots resulting in an early loss of the electronics in the field. The reason for this is the degeneration of various materials at these local hot spots.
Meanwhile the complete copper filled through holes was realized in 2006,by bridge plating or X -plating technology. Nowadays,completely copper filled through hole structures are at the leading edge of technology for thermal via structures because copper has almost the best thermal conductivity and it has to be plated nonetheless. The 3rd driver is the signal frequency. Electronic signals in an electronic package or inside of a PCB are increasing over time and continue to do so. Stacked microvias and fan-out vias are becoming more and more of a disadvantage for the transmission of high frequency signals,due to the fact of creating resistances at high frequencies. Therefore,the push of high frequency applications further increased the demand for technologies like copper filled through holes.
The 4th driver especially for through hole filling,is the quality-yield aspect. The alternatives for electroplated copper filled through holes,requires many additional process steps,or new materials such as plugging pastes. Each of these additional process steps or materials introduces a variety of risks and manufacturing problems resulting in lower yield. Therefore the “one step” solution to fill through holes with copper is the preferred solution,without introducing new materials into the PCB. This paper describes the reasons for development and a roadmap of dimensions for copper filled through holes,microvias and other copper plated structures on PCBs. The paper will contain aspect ratios,dimensions and results of plated through holes used today in high volume manufacturing for microvia and through hole filling with electroplated copper. Furthermore,it will also show feasibility studies of new electroplated structures for future applications such as copper pillar plating on IC-substrates.

Author(s)
Mustafa Özköt,Sven Lamprecht,Akif Özkök,Dolly Akingbohungbe,Moody Dreiza
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Robust Reliability Testing for Drop-on-Demand Jet Printing

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In this study,the question was how to perform statistically reliable robust- ness tests for the non-contact drop-on-demand printing of functional fluids,such as solder paste and conductive adhesives. The goal of this study was to develop a general method for hypothesis testing when robustness tests are performed. The main problem was to determine if there was a statistical difference between two means or proportions of jet printing devices. In this study,an example of jetting quality variation was used when comparing two jet printing ejector types that differ slightly in design. We wanted to understand if the difference in ejector design can impact jetting quality by performing robustness tests. and thus answer the question,"Can jetting differences be seen between ejector design 1 and design 2"?

Author(s)
Gustaf Martensson,Patrik Mirzai
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Dispensing EMI Shielding Materials: An Alternative to Sputtering

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Shielding electronic systems against electromagnetic interference (EMI) has become a hot topic. Technological advancements toward 5G standards,wireless charging of mobile electronics,in-package antenna integration,and system-in-package (SiP) adoption are driving the need to apply more effective EMI shielding and isolation to component packages and larger modules. For conformal shielding,EMI shielding materials for exterior package surfaces have mostly been applied with a physical vapor deposition (PVD) process of sputtering,leveraging front-end packaging technologies to back-end packaging applications. However,sputtering technology challenges in scalability and cost along with advancements in dispensable materials are driving considerations for alternative dispensing techniques for EMI shielding. The authors will discuss development of a spray coating process to apply EMI shielding materials to the exterior surfaces of individual components on strips and larger SiP packages. Using newly developed and enhanced materials and equipment for this industry,a process was demonstrated that provided uniform coating on packages in the sub-10µm thickness range with consistent coating thicknesses around package corners and package sidewalls,producing a top surface-to-sidewall thickness ratio of 1:1. Further investigation showed decreased production costs for applying EMI shielding to component packages by increasing spray-coating productivity and by selectively applying the coating to specific areas of packages. Additionally,low capital-equipment expense and shorter lead times for spray coating equipment improved the ability to scale up production capacity compared to sputtering equipment. In mobile electronics packaging,several SiP-module manufacturers are challenged to isolate components within the SiP from each other and from their exterior for EMI shielding. Trenches are cut around the interior components and conductive paste is dispensed into the trenches to form smaller Faraday cages within the package. As trench designs become narrower,it becomes imperative to control both the volume and placement accuracy of the material filling the trenches. The latest,advanced jetting products provide control of the volume while the narrow,in-air stream width delivers accurate trench-fill. In a final step,the tops of these paste-filled trenches are connected by applying exterior EMI shield coating. Spraying overcomes challenges faced when using sputtering equipment and harnesses the improvements in both the EMI shielding materials and the equipment for depositing it,so that SiP packages can be manufactured using efficient back-end packaging techniques.

Author(s)
Garrett Wong,Jinu Choi
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Trump Administration has Opportunity to Ease EPA Reporting Burden for Electronics Industry

Feb 26, 2019
By Chris Mitchell, IPC Vice President, Global Government Relations The finish line may be in sight in a decade-long effort to persuade the U.S. Environmental Protection Agency (EPA) to curb unnecessary and duplicative Toxic Substances Control Act (TSCA) reporting requirements that discourage recycling of manufacturing byproducts. In January, EPA sent the White House Office of Management and Budget a draft proposal to make changes to the current Chemical Data Reporting (CDR) regulations. Although the draft proposal has not been released publicly, we believe it may address reporting obligations for byproducts sent for recycling. It remains to be seen whether the changes that EPA is proposing constitute meaningful relief for U.S. printed circuit board manufacturers. Printed circuit board manufacturers have long been committed to sound environmental practices, including the recycling of byproducts to reduce waste and recover valuable metals. Current TSCA reporting requirements, however, are forcing some PCB manufacturers to consider whether recycling is too burdensome and, more importantly, too risky. Existing TSCA regulations contain specific exemptions for byproducts, but the EPA’s narrow interpretation of these rules over the past 13 years has eliminated any meaningful distinction between new chemical products and byproducts. EPA has interpreted TSCA’s exemption of byproducts to apply only if the “chemical component” in the byproduct is removed through a process not involving a chemical reaction. In effect, this interpretation excludes the recycling of metals from the exemption, and instead treats metal-containing byproducts sent for recycling as new products subject to the full regimen of TSCA regulation. Most significantly, this includes a Pre-Manufacture Notice (PMN), registration, and other requirements under Sections 5 and 6, as well as reporting and monitoring under Sections 8 and 12 and associated penalties or enforcement provisions. The burdens imposed by EPA’s approach to this issue discourages recycling without providing any additional protection of public health and the environment. Consider the following facts: 1. EPA has not demonstrated that TSCA registration and reporting of byproducts sent for recycling is needed to protect public health and the environment. For nearly 30 years prior to 2003, EPA did not require reporting on inorganics because they were considered low risk. In 2011, EPA made a commitment to reexamine reporting requirements based on the data received during the 2012 reporting cycle, to determine whether some reporting could be eased or eliminated. IPC – through in-person meetings, letters and congressional testimony – has urged EPA to complete this analysis. But to date, we are unaware of any meaningful analysis of this data. 2. TSCA reporting imposes a burden on manufacturers. In addition to reporting of byproducts required under other laws, namely RCRA and EPCRA, TSCA imposes an additional layer of reporting for manufacturers. Most PCB manufacturers send byproducts for recycling despite the cost and despite the risk of regulatory fines for TSCA non-compliance. A typical printed circuit board factory has a database of well over 300 chemicals entries. Reporting under Section 8 requires generating very detailed information on chemical compounds or substances sent for recycling and how they may be processed by the recycler. Each TSCA report can average 64 labor hours per facility. 3. The guesswork required to report byproducts sent for recycling exposes manufacturers to considerable risk. EPA bases the applicability of notification and reporting requirements on the recycler’s actions, yet it requires the byproduct generator to make this determination. This is problematic because when the generator sends the byproduct for recycling, it may not have the information needed to determine regulatory applicability. Only the recycler knows for certain what chemical reactions (often safeguarded as trade secrets) will take place during the recycling process and how the resulting chemicals will be used. Yet, byproduct generators are required to report on this information, and they risk fines of $37,500 per day for each chemical they fail to report fully and accurately. 4. TSCA reporting of byproducts sent for recycling is largely duplicative of reporting required from the recycler and by other environmental, health and safety laws. TSCA reporting requires byproduct generators to provide information that serves the same purpose as that reported by recyclers. Moreover, EPA seeks the same basic information from byproduct generators under other reporting regimes (e.g. RCRA and EPCRA); but because EPA offices do not coordinate, the various reporting regimes require the same information to be provided in several different formats, increasing the burden. 5. Congress itself has required EPA to reduce the reporting burden on byproducts sent for recycling. In 2016, as part of the Frank R. Lautenberg Chemical Safety Act, IPC persuaded Congress to require the EPA Administrator to finalize within three and a half years a negotiated rulemaking “limiting the reporting requirements … for manufacturers of any inorganic byproducts, when such byproducts, whether by the product manufacturer or by any other person, are subsequently recycled, reused, or reprocessed.” Unfortunately, the negotiated rulemaking process ground to a halt after only a few months of effort due to an impasse among the stakeholders. The good news is that the Trump Administration can resolve this issue through the new CDR rulemaking, most simply by eliminating TSCA reporting for inorganic byproducts sent for recycling. Until then, the existing reporting requirements will continue to discourage recycling of resource-rich byproducts and impose unnecessary business burdens on U.S. manufacturers.

Electronics Industry Joins Call for Passage of USMCA

Feb 26, 2019
Statement from IPC President and CEO John Mitchell Representing the views of more than 2,500 U.S. companies engaged in the global electronics industry, and their nearly 1 million workers, IPC – Association Connecting Electronics Industries, is joining the new USMCA Coalition. which is being launched today in Washington by the U.S. Chamber of Commerce. More than 200 companies and associations representing an array of economic sectors are backing the USMCA Coalition, which will advocate for congressional approval of the United States-Mexico-Canada Agreement. “Building a stronger U.S. electronics industry depends in no small measure on building a stronger North American supply chain,” said IPC President and CEO John Mitchell. “Our association has members with both headquarters and thousands of jobs in the U.S., Mexico and Canada, and thus we have a strong interest in securing enactment of this agreement. “The USMCA promises to spur even greater integration among the North American economies and strengthen the region’s stature as a formidable global manufacturing base. Improving the manufacturing competitiveness of North America will unlock more growth, innovation and job creation, benefiting people across the continent and the world. “As always, IPC will continue to advocate for our members’ interests as the debate goes forward.”

Microvia Subcommittee Brings Industry Together, Hosts Open Forum

Feb 22, 2019
By Chris Jorgensen, IPC director, technology transfer; IPC staff liaison to V-TSL MVIA Weak Interface Microvia Failures Technology Solutions Subcommittee In early 2018, Jerry Magera and J.R. Strickland, Motorola, answered a call for white papers from the IPC V-TSL Technology Solutions Committee. Their white paper, IPC-WP-023, casts a light on an issue that has been troubling the printed board manufacturing industry and upstream users of printed boards: failures at the microvia interface. IPC-WP-023, an IPC Technology Solutions White Paper on Performance-Based Printed Board OEM Acceptance, Via Chain Continuity Reflow Test: The Hidden Reliability Threat – Weak Microvia Interface, proclaims stacked microvia reliability problems link to a weak interface between microvia target pads and electrolytic copper fill and provides data in support of their observations. Observations IPC would learn are being reported by numerous IPC OEM Member companies. There was so much interest in this white paper, a new subcommittee, IPC V-TSL-MVIA Weak Interface Microvia Failures Technology Solutions Subcommittee, formed in summer 2018 to begin investigating the potential causes of these failures and to provide industry resources on the topic. Over the course of multiple web meetings, this group, representing the entire supply chain and numerous end-market segments, broke ground on an activity to begin to attempt to flesh out the potential causes of these interface failures to propose to industry solutions to address the issue. During IPC APEX EXPO 2019 in San Diego, the subcommittee hosted an open industry forum to share its activities, its plans for bringing industry together to work on solutions to the problem and its planned path ahead. This meeting attracted 97 attendees, almost all of whom raised their hands, when asked by V-TSL-MVIA chair Marc Carter, SAIC, “Who has seen this issue in their products?” Carter shared the activities of the subcommittee to date, which is focused on gathering existing, open data on the issue and querying industry for the types of data their companies collect on the issue. Rather than reinvent the wheel, and to best advise IPC on if and how to progress with industry studies, the group will work to gather information in the public domain that could provide common clues regarding the interface failures. The group will compile this research into additional resources to be made available through the IPC Technology Solutions Committee through white papers and other resources. In its efforts to get an understanding of existing data “behind the curtain” with companies, the subcommittee has also created a survey for industry that will provide the subcommittee information on types of data that could be available. These surveys are submitted to IPC staff and all company information is removed from them before being submitted to an agent of the subcommittee for compiling. By understanding what data are already available, the subcommittee could then identify common denominators in data collected to request the actual data from industry for developing initial reports and to be able to best advise industry on round robins or other industry research initiatives that would fill the gaps in existing data. Carter explained that the next step for the subcommittee is to break into A-Teams based on high-level topic areas from a fishbone diagram the subcommittee created. These A-Teams will gather and disseminate data to present reports on its findings back to the subcommittee. These reports can then be compiled into larger reports or resources for industry. The A-Teams are: • Simulation and Modeling • Characterization and Test Methods • Laminate Materials • Construction Design Elements • Metallurgy • Chemical Processes • Hole Formation • Data Collection Carter stressed that although this subcommittee is open to anyone to join, a requirement of being a member of the subcommittee is that your company will share information or expertise as active participants. Others in industry who simply want to learn and observe will be able to do so through additional reporting sessions, white papers and other resources and reports from the subcommittee. Following Carter’s introduction, J.R. Strickland, one of the IPC-WP-023 co-authors, presented Microvia Weak Interface Failures: Current Understanding and Mitigation. Based on the research shown in the presentation, their conclusions are to not use more than two stacked microvias and that staggering the microvias can make them much more reliable. One of the most interesting findings in their investigation was when they attached an electrical probe to their test boards they put through reflow, they could spot the actual moment the microvia detached from the interface and then reattached before coming out of the oven. This detachment would not be recognized by electrical testing before and after reflow. Motorola also indicated they have seen failures between copper fill and electroless, electroless and electrolytic and electroless to copper pad. You can view the Motorola slide deck here. Happy Holden, who is disseminating blind survey responses submitted to IPC staff, presented on the fishbone diagram developed by the subcommittee and the types of data the subcommittee is collecting. He also presented the early results of the industry survey. You can view Holden’s data mining slide deck here. How You Can Get Involved People with interest in this topic should get a copy IPC-WP-023, which is available from the IPC store, and share their experiences with IPC by e-mailing me at ChrisJorgensen@ipc.org. The more IPC can learn about the scale of this issue and companies that are affected by it, the better. As mentioned, the IPC V-TSL-MVIA Subcommittee is open to anyone to participate, but your company will be required to actively participate through data and information sharing and/or providing expertise on the topic. If you have interest in learning about the subcommittee and your expectations as a member of it, e-mail me at ChrisJorgensen@ipc.org.

March 1 Deadline for U.S.-China Deal Nears

Feb 19, 2019
By Chris Mitchell, vice president, global government relations As the hours tick closer to the end of February, negotiators for the United States and China are attempting to solve in weeks trade and economic issues that have lasted for decades. Last week, U.S. Treasury Secretary Steve Mnuchin and Trade Representative Robert Lighthizer attended high-level trade talks in Beijing. According to the White House, the discussions focused on “structural issues, including forced technology transfer, intellectual property (IP) rights, cyber theft, agriculture, services, non-tariff barriers, and currency.” While there has been stated progress in some areas, the two sides appear to remain far apart on IP protection and technology transfer. The seemingly constant negotiations are the result of the 90-day trade negotiation agreement, which ends March 1, approved by President Trump and President Xi after a meeting at the G20 on December 1. The agreement to negotiate halted further tariff action by both countries in the interim, including the planned increase of tariffs on $200 billion in Chinese imports, included in a third list of products targeted by tariffs that the Administration released last year, from 10 percent to 25 percent on January 1. While the tariffs remain at 10 percent, companies are not allowed to apply for product exemptions as they are with products on the first two lists of tariff-targeted products. President Trump has long said that he will not agree to any deal until he meets with President Xi and that is not scheduled to take place before March 1, though some have suggested that a phone call could be sufficient for him. Prior to last week, President Trump and other Administration officials had been fairly adamant about refusing to consider extending the deadline, even if talks were going well. However, that rhetoric has begun to change with unnamed officials floating the possibility of a 60-day extension if progress continues to be made. We likely will not know if the tariff rates will increase or if the deadline will be postponed until immediately prior to Administrative action. It is also important to note that any agreement and commitments will be contained in a Memoranda of Understanding, rather than a more formal agreement that could be subject to Congressional approval. There has been bipartisan support for the Administration’s attempt to address U.S.-Chinese trade issues, but some members have expressed concern about the end goal – and the ability of the Chinese to make systemic economic and political changes – in a matter of weeks, as well as the pressure continued tariffs are having on agriculture, small and medium sized businesses, and other constituent concerns. Chinese officials are in Washington this week to continue talks.

IPC Launches Education Foundation to Strengthen Next Generation of Workers

Feb 18, 2019
IPC President and CEO John Mitchell discusses the IPC Education Foundation, an organization that focuses on strengthening and shaping the next generation of workers by preparing the talent pipeline and offering scholarships to deserving students. https://www.youtube.com/watch?v=d0hNwcaCKG4

Seven Takeaways from IPC APEX EXPO 2019

Feb 12, 2019
By Chris Mitchell, IPC Vice President of Global Government Relations IPC’s most recent annual conference and trade show, IPC APEX EXPO 2019, took place in late January, and by all indications, it was among the best IPC shows ever! The overall success and quality of IPC APEX EXPO is a testament to the innovation and growth taking place in the electronics industry, as well as our members’ passion and commitment to standards development, learning opportunities, and pro-industry initiatives. Here are my top seven take-aways from IPC APEX EXPO, from the perspective of someone whose job requires translating our highly technical industry into everyday language that policymakers and their aides can understand. 1. IPC Connected Factory Exchange (CFX) Takes Center Stage IPC-CFX is an industry standard designed to serve as the digital backbone of electronics manufacturing companies. By simplifying and standardizing machine-to-machine communications, CFX is establishing a foundation for “Industry 4.0” applications. The surest sign of CFX’s success were the dozens of exhibitor booths sporting “CFX Supporter” placards. You couldn’t miss them on the showroom floor, nor could you miss the interest in the two full-scale CFX demonstration lines which hosted hourly tours throughout the week. To learn more, please visit www.ipc.org/cfx or contact IPC Vice President of Standards and Technology David Bergman. 2. Sector-Specific Initiatives Paving Way for New Innovation In a sign of how critically important electronics are in supporting the growth and innovation of other industries, IPC APEX EXPO was the venue for a well-attended executive forum on the future of automotive electronics and a separate “buzz session” on e-textiles, as well as standards committee meetings related to both. As the automotive and textile industries integrate electronics into their products in ever more creative ways, they will rely on partners like IPC to establish the necessary standards to ensure high reliability and performance. Contact Sanjay Huprikar, IPC Vice President of Solutions to learn more about our work with the automotive industry, and Chris Jorgensen, Director of Technology Transfer, about our work with the textile industry. 3. IPC-1791 QML Program Poised for Significant Growth Also at IPC APEX EXPO, the US Department of Defense’s Executive Agent for Printed Circuit Boards hosted its annual meeting, and IPC Director of Validation Services Randy Cherry was on hand to update participants on the development of IPC-1791, Trusted Electronic Designer, Manufacturer and Assembler Requirements and its associated Qualified Manufacturers List (QML) program. The IPC-1791 standard and QML program aim to establish a trusted supplier program focused around the design, fabrication and assembly of PCBs. The existing standard will get its first revision this month, and seven companies are now participating in the beta test audits. As DoD seeks to strengthen the security and reliability of its supply chain, the IPC-1791 standard and QML program will serve as a model for DoD-industry collaboration. To get involved, contact Randy Cherry. 4. IPC Launches Education Foundation and Inspires More Than 100 San Diego-Area Students Perhaps the most fun event of the week came when IPC hosted more than 100 San-Diego-area high school students to APEX for panel discussions, hands-on training in soldering PCBs, and tours of the expo floor. These students were so inspiring—smart, curious, and attracted to careers in STEM fields. The IPC Education Foundation, which was launched during IPC APEX EXPO, will strive to help these students succeed. As two of its first initiatives, the foundation will be partnering with several organizations to distribute a basic electronics curriculum to hundreds of high schools, and it will be creating IPC student chapters at universities and community colleges across the country. Many thanks to the IPC member companies who helped make this event a huge success, including Calumet Electronics and Weller Apex Tool Group. To learn more and get more involved, contact Colette Buscemi, IPC senior director of education. 5. Tesla CTO and Co-Founder JB Straubel Offers Insights on Growth and Innovation JB Straubel offered IPC APEX EXPO participants a captivating recounting of the Tesla story. Four big themes stood out. First, Tesla’s founding combined the profit motive with a desire to advance environmental sustainability. Second, developing its first roadster meant Tesla had to challenge every automotive norm, with little room for fallback options. Third, improving its cars today means weighing financial and technological trade-offs. And fourth, Tesla is focused on making smart strategic investments that leverage its technological leadership in markets that can be scaled up. All four of these points are relevant to IPC members who are looking to build upon their growth and technology leadership in a very competitive global economy. 6. 2019 Looks Good for the Electronics Industry What’s the outlook for the electronics industry in 2019? A growing number of economists are voicing concerns about the possibility of major economies edging into recession as early as this year. Political turmoil in the U.S. and Europe, coupled with global trade disputes and a slowdown in China, are doing nothing to calm fears. However, the industry members I spoke to at IPC APEX EXPO felt pretty good about 2019. Sales remain strong, companies are hiring, and the supply chain is slowly adjusting to global uncertainty. 7. IPC Government Relations Expands its Global Reach and Grassroots Program During our IPC Government Relations Committee meeting at IPC APEX EXPO, I shared that our public affairs program continues to expand in breadth, depth and geography. We are taking on new issues, including federal support for lead-free research, and we are doing so with greater support from industry experts and seasoned policy experts in the U.S. and Europe, with additional plans for long-term, strategic engagement in Asia in 2019. To get involved, contact me and/or sign up at the Advocacy Center on our website. You can also follow me on Twitter. These were my top take-aways from my perch atop IPC Government Relations, but it cannot be said enough: The power of IPC APEX EXPO lies in the thousands of attendees who take part in standards committees, policy committees, executive forums, buzz sessions, and professional development. And of course, many thanks to the hundreds of companies who exhibited their goods and services and brought so much excitement to the show floor.
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