Using Lean Six Sigma to Optimize Critical Inputs on Solder Paste Printing

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Solder paste printing is the first step in the surface mount manufacturing process for PCBA assembly. When the solder paste printing process is uncontrolled,defects can be produced,which may not become apparent until the PCBA is downstream. Even though defects are present,the PCBAs may not be scrapped because rework can fix the defects. This can make the cost of poor quality appear low because the scrap rate is low. These rework loops are also called the hidden factory. The hidden factory means that these rework loops hide the cost of poor quality associated with fixing the defects because the PCBA was not produced right the first time. Rework also reduces efficiency because of the time required to fix the defect. From a lean perspective,rework is the waste of defect,which is one of the eight wastes. The surface mount solder paste printing process has a solder paste inspection process immediately afterwards. This inspection process measures certain characteristics of the solder paste,such as volume,height,area and offset. The inspection process will alert the operator to a potential defect. When an alert happens,the operator will look at the PCBA to determine whether or not there is a true defect. If the operator determines that there is no defect,or the alert was a false failure,the operator will manually override the solder paste inspection machine and label the PCBA as a pass. The PCBA then proceeds to the parts placement machines. The risk present in the manual override is that it relies on operator judgement. There is also the risk that if too many false failures present themselves,the operator may be led to believe that every alert is a false failure and immediately override the alert even though a defect is present. This can be a very high risk scenario,especially with PCBAs that go into medical devices. Some manufacturers are looking into turning off the override function,which will stop the line if the automated inspection system sees a potential defect. This will prevent defective PCBAs from getting to the customer but will cause efficiency loss,and increased cost,when the line stops. There is also the risk of not getting the customer the product on time. This makes it real important to identify the critical inputs to the solder paste printing process and ensure they are controlled so that manufacturers are able to optimize the output of the process. This paper will discuss how Lean Six Sigma techniques were used to optimize the solder paste printing process. It will highlight how a cross-functional team used the structured Define,Measure,Analyze,Improve and Control (DMAIC) methodology to identify and control the critical inputs. The advantage of the Lean Six Sigma methodology is that it guides the team through the rigorous structured process so that all possible inputs are considered and the critical ones can be identified. The cross-functional team is led by a Master Black Belt or Black Belt,who is skilled in both the technical aspects of the Lean Six Sigma methodology along with the soft skills needed for team management. The paper will demonstrate the use of tools such as the IPO (Input-Process-Output) diagram,Cause and Effect Diagram,Fractional Factorial Experiments and Full Factorial Experiments. It will then show how pilot runs were made in order to confirm the model,which was drawn from the designed experiments.

Author(s)
Tom Watson
Resource Type
Technical Paper
Event
IPC APEX EXPO 2017

Effect of Permittivity and Dissipation Factor of Solder Mask Upon Measured Loss

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Existing coated microstrip trace impedance estimation usually uses the dielectric constant (Dk) of solder mask ink measured at 1 MHz from its datasheet. Or,some printed circuit board (PCB) manufacturers tend to first calculate the impedance of surface microstrip line and multiply this value by an empirical coefficient such as 0.94 or 0.96 to get the impedance of coated microstrip line. In addition,PCB engineers always underestimate the loss caused by solder mask upon microstrip line (conductor-backed coplanar wave guide in this paper) of flexible printed circuit (FPC)or server PCB. However,as signal speeds move into the 10 Gbps range,standard FR-4 is gradually being replaced by low dissipation factor (Df) material like modified FR4 or PPO and the Df gap between laminate and solder mask is huge. Thus,it is significant to evaluate the effects of solder mask in 3D modeling and EM simulation. This paper describes a set of methods to extract the permittivity and dissipation factor of a standard and a low-loss solder mask ink. The measured S parameters have been de-embedded by AFR (Automotive Fixture Removed) calibration method. When modeling,copper surface roughness has been considered.

Author(s)
Hao He,Rongyao Tang
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Condensation Testing - A New Approach

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Conformal coatings are applied to protect electronic assemblies from adventitious environmental factors,which include,for example,corrosive gases,corrosive fluids and high humidity. Whenever there is a significant level of humidity,there is always the opportunity for parts of the assembly to drop beneath the dew point,thus resulting in the formation of condensed water on the surface of the assembly,which can significantly reduce the insulation resistance of the boards surface,resulting in malfunctioning electronics. While the characterization of coating performance under high humidity conditions is detailed,in well accepted IPC and IEC standards,the performance and testing under condensing conditions is not so well developed. This situation largely reflects the hardware challenge. Most humidity chambers are designed to achieve stable,well controlled humidity and temperature conditions,but none of these offer condensing options. Therefore the user has to improvise. A common approach to attempt to achieve condensing conditions is to ramp at a fast enough rate to cause condensation,a feature the humidity chamber designers have by and large,successfully managed to remove. Alternatively chambers run very close to 100% relative humidity and hence at this condition condensation will occur in various parts of the chamber. An immediate drawback of these approaches is that chambers of different designs will perform differently,and will be sensitive to small drops in cooling performance. There are many alternative approaches to achieving condensation,and these are described in ISO,IEC,ASTM and others,and commonly attempt to drive a chamber into producing condensation,against the anticipated use condition,and hence sensors in the chamber detect the additional moisture and will work to reduce the humidity level to the required set-point. Thus,the level of experimental control will be very dependent on the chamber performance,and variability across chamber manufacturers can be expected. A new approach has been developed where the test board is mounted on a substrate whose temperature can be independently controlled without changing the ambient condition. Thus,the temperature of the test board can be depressed below ambient to any desired point and hence,produce condensation at different levels. It is then,therefore,straightforward to cycle between condensing and non-condensing conditions on the test board in a constant ambient environment. The technique has been demonstrated to be repeatable and controllable,with the user able to select a temperature differential that matches their worst in-use conditions,or to understand the performance of their system under a range of condensing conditions. The data for a range of conformal coatings are presented,and correlated back to the conformal coating material type,and coverage and thickness by cross-sectioning.

Author(s)
Chris Hunt,Ling Zou,Phil Kinner
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Test Method Development for Detecting Pitting/Crevice Corrosion Formation on Electronic Assemblies

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Pitting/Crevice corrosion on printed circuit boards has not been well studied in the industry. This mechanism has been seen at small solder mask openings near circuit traces on printed circuit boards when stored or shipped in a humid environment with no-clean soldering fluxes that passed all standard tests. Failure modes are theorized to be driven by openings or defects in solder masks and humidity levels that mobilized surface contamination. Harsh environments,that can bring in outside contaminates,can be one of the factors that causes pitting corrosion to initiate and grow. In many of the applications employing high density assemblies processed with mixed technology,the quality of the laminate construction,the assembly process and quality of design are critical. Solder mask type (glossy or matte) curing and application process have been known to cause corrosion issues. Often the solder mask employed (manufacturer,chemical structure,Tg,filler type and thickness) can be factors that lead to pitting corrosion and should be understood. In some cases,the thickness,quality and roughness of the copper at the surface can contribute to corrosion. The High Density Packaging User Group Consortium (HDP User Group) Electro-Chemical Migration (ECM) team is investigating pitting / crevice corrosion failure mechanism and the factors that cause the defect to occur. The purpose of the research is to report current findings and the experimental description for qualifying soldering materials and to determine conditions needed to mitigate this failure mechanism.

Author(s)
Mike Bixenman,Wallace Ables,Richard Kraszewski,Chin Siang Kelvin Tan,Julie Silk,Kieth Howell,Takatoshi Nishimura,Jim Hartzell,Karl Sauter,Robert Smith
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

PCB Sourcing Using PCQR

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In a global market,it is often difficult to determine the best PCB suppliers for your technology needs,while also achieving the lowest costs for your products. Considering each PCB supplier has their own niche in terms of equipment,process,and performance,uniform test data from the IPC-9151D Process Capability,Quality,and Relative Reliability (PCQR2) Benchmark Test Standard can help find the right source for the board based on its specific technology requirements. By using a data-based approach to vendor selection,this can remove the subjective nature of sourcing,reduce the need for PCB process experts to map suppliers into technologies,and eliminate irrational sourcing decisions. By incorporating the standard results into our corporate quote model,our company has significantly lowered costs,both by helping to get each board to the right supplier and by reducing failure rates during development,in production,and in the field. Using PCQR2,the company screens for suppliers that can deliver consistent quality utilizing statistical process control (SPC) to monitor and control their process variables,filtering out those that rely on specific employees for temporary success. In addition,the company is able to track PCQR2 performance trends from submission to submission,allowing for the observation and correlation of capability advancement with improving equipment and processes. Using this data,the company can then push our supply base by challenging them to build higher-technology PCQR2 samples when ready,which,in turn,moves them higher in the quote model and leads to more quoting opportunities and higher revenue.

Author(s)
Al Block,Naji Norder,Chris Joran
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Utility of Dual Applicators for Non-Atomized Conformal Coating to Improve High-Volume Manufacturing Optimization

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Electronics manufacturers protect their circuit boards with conformal coatings. Conformal coatings serve as a barrier from environmental hazards and internal shorts,tin whiskers,and corrosion at the board level. Within conformal coatings different material chemistries specialize in shielding from an array of hazards and can be applied by multiple methods. The most common method is atomized spray which disperses the material into a fine mist. Alternatively,non-atomized coating controls the materials’ dispense shape while maintaining the original liquid form. While some applications demand atomized spray and other scenarios overlap between atomized and non-atomized coating,this paper focuses on the circumstances where materials are ideally suited for non-atomized,selective coating. Board manufacturers and their process engineers are tasked with effectively protecting the boards they produce. High-volume manufacturing recognizes optimized set-ups to improve dispense quality,process control,reliability,and repeatability,while reducing material costs. For high quality,accurate,and repeatable conformal coating with efficient throughput,large-scale manufacturers utilize automated selective coating. Selective coating is used to coat specific components or areas of a board while respecting keep out zones. To further increase transfer efficiency,selectivity,throughput,yield,and reduce masking and rework,a non-atomized process is worth consideration. At times the best way to achieve target results requires an effective team. This can be accomplished using two applicators with different dispense technologies. The first is a film coating applicator with a non-atomized dispense that delivers a clean edge definition and coats boards with broad passes up to 750mm/sec. This applicator can be paired with a precision jet applicator that has capability for dispensing discrete dots. This resulting combination enables high-volume manufacturers to create conformal coating programs to maximize control,reduce waste,increase throughput,selectively coat,and reduce rework. Adding process controls to an automated system provides accountability with traceability and process parameter maintenance. By pairing these two applicators the utility for non-atomized,selective systems will continue to grow.

Author(s)
Camille Sybert,Michael Szuch
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

A Review of Jetting Technologies for Fluid Dispensing - Identifying the Features that Influence Productivity

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As consumer products continue to reduce in price,pressure is placed upon the manufacturing of sub-components for improving cost. Back in the mid-1990s,jet valves for fluid dispensing in electronics assembly entered the market,displacing older technology with significantly higher dispenser productivity resulting from high flow rates and reduced up/down motion requirements. As jet valve technology has evolved,valve actuation systems have continued to improve,pushing toward higher jet frequencies and smaller jetted dot volumes. In recent years,equipment suppliers have started promoting piezo-driven jet valves with significantly higher frequencies than traditional pneumatic-driven jets. However,in many cases,the implied promise of higher productivity and lower production costs per part resulting from higher frequency jetting never fully materialized. In further studies,fluid flow rate and jet frequency are not always the largest levers to improve productivity in some applications. We will examine several fluid dispensing applications from PCB assembly to wafer-level packaging,and review the potential productivity enhancements from moving to higher frequency jetting. We will also review additional factors that may impact the realized production cost savings such as component part reliability considerations,process program layout,closed-loop process controls,and non-dispensing operations of the fluid dispenser. High-frequency,piezo-driven jets can add value to a number of high-volume production applications. However,the frequency specification of a jet valve should not be the primary factor considered when selecting a dispensing process. Rather,a holistic view of the production costs and factors affecting productivity and cost-effectiveness should be used in making such decisions. In this paper,we seek to elevate the conversation above the noise of ever increasing jet frequency to see the bigger picture and identify what ultimately matters for reducing production costs per part

Author(s)
Garrett Wong
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Improved Maintenance and Reliability for Large Volume Underfill Processes

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An ever-increasing number of electronics assembly applications are using flip chip packages that require large volume underfill. Large volume underfill is typically defined as being for a die size greater than 12 x 12 millimeters and requiring the underfill volume to be >20 milligram (mg). These types of high volume,high speed,precise underfill processes in High Volume Manufacturing (HVM) are posing significant challenges to meeting higher Units per Hour (UPH) requirements; in some cases these requirements mean up to a 33 percent increase when compared to the previous year’s output. Streaming is gaining favor as a fast and robust non-contact dispense method for underfill; however,when streaming underfill over an extended time,the volume of material passing through the pump may cause problems that impact dot volume repeatability. This is due to the fluid pathway containing dead spaces,which trap the material,complicating flushing and contributing to fluid adhesion over time. Such dot volume fluctuations may lead to undesired fillet size variations,and result in defects. This paper examines proven methods of mitigating dot variations and providing for better maintenance,such that the large volume underfill process can be run without maintenance for more than 3 weeks,an unheard-of zero maintenance interval to date. This paper will also address the challenges faced during dispensing of large volume underfill in HVM,and how control of a number of variables affecting underfill dispensing can achieve up to 3 week zero maintenance intervals for higher throughput and process reliability.

Author(s)
Sunny Agarwal
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Approaches to Commercializing New Nano-Electronic Materials

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•Nano-electronics potential
•Barriers to entry – and opportunities
•Examples
–Nano-solder
–Capacitor materials
–Graphene
•Opportunities for rapid commercialization?

Author(s)
Alan Rae
Resource Type
Slide Show
Event
IPC APEX EXPO 2016

Factors Affecting the Adhesion of Thin Film Copper on Polyimide

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The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described [1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system,which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate. In this paper,we investigate the factors which improve and inhibit adhesion. It was found that the ink composition,photonic sintering conditions,substrate pretreatment,and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important. Ink factors include the intensity of photonic sintering. Better sintering leads to better cohesive strength of the nano copper layer. The ink solvent and the dispersant used to suspend the nano particles are significant both for adhesion and the colloidal stability of the dispersion. Pretreatment of the substrate by plasma roughening did not improve adhesion. We describe the effects of chromium and nickel interlayers which are typically used in standard foil laminates. Finally,we describe the types of peel testing used to assess adhesion.

Author(s)
David Ciufo,Hsin-Yi Tsai,Michael J. Carmody
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016