The use of high performance electronic assemblies in harsh environments subject solder interconnects to complex loading conditions that are primarily driven by the behavior of circuit card assembly and mounting constraints. These assemblies contain a variety of surface-mount devices which are sensitive to thermo-mechanical (TM) fatigue. Stresses generated by placing certain components within the vicinity of mechanical structures,such as standoffs and connectors,can further influence solder fatigue by increasing PCB strains. The mounting constraints can subject packages to loads which are not expected to occur under non-constrained PCB configurations often used in accelerated testing. In order to determine the influence of complex board constraints on electronic components,thermal simulations are performed using finite element analysis (FEA). Detailed models of large electronic assemblies are often tedious and time consuming to construct. In this study,TM simulations of electronic assemblies are implemented to investigate the effect of mounting conditions on board strains. The software used in this analysis enables fast integration of package level and printed circuit board (PCB) features from design files into comprehensive models enabling efficient analysis of the entire board level assembly under thermal loads. These simulations capture the contribution of both local and global coefficients of thermal expansion (CTE) mismatch in the vicinity of mounting conditions and components. The software package implemented in this analysis enables the prediction of board behavior of complex electronic assemblies under TM loads and provides an efficient approach to enhancing circuit board layout.

When it comes to reliability assessment of an electronic system,consisting of several components,such as an assembled printed circuit board (PCBA),this often turns out to be a challenging task. The more different partners within the supply chain are involved the more a specimen and testing based approach becomes difficult,causing increased time demand and higher testing cost. One way to tackle this topic is to intensify the use of finite element based simulation for reliability assessment. While state of the art in many areas of industry,from aerospace industries to construction works the use of Finite Element Analysis (FEA) is still somewhat uncommon in printed circuit board (PCB) industry. The current paper presents a good use case for the application of FEA for the assessment of the thermal reliability of PCBAs. The samples have been stressed by thermal shock test (TST),with a distinct focus on the failure modes of the solder connections between surface mount devices (SMD) and the PCB. The defined PCBA systems were transferred into 3D finite element models,considering major material parameters such as the orthotropic behavior of the laminate layers or the highly non-linear behavior of copper and solder. The established models were then subjected virtually to TST in order to investigate the reliability performance of the systems. Based on the initial models the main phenomena influencing solder failure were identified and investigated more closely. Finally,the results obtained from the finite element based virtual assessment were compared to the results of the actual hardware based test series regarding the solder failure mode and system life time in order to show the current capabilities of FEA as a tool for reliability assessment.

Plasma is considered to be the 4th state of matter. Decomposed molecules interact with all exposed surfaces of the material,even the inner surfaces of open cell structures. In low pressure plasma technology,a stable and effective plasma is created by an electromagnetic discharge of a gas at low pressure and at low temperature. Splash-proof case study: Complex 3D-substrates were coated with a ROHS - and WEEE - compliant super hydro- and oleophobic low pressure plasma conformal nanocoating. These electronic devices were then subjected to splash-proof testing according to IEC60529. IP ratings from IPX2 to IPX4 were obtained,depending on the device’s design. Acoustic performance was tested on microphones and speakers by measuring the sensitivity for a frequency range from 20 Hz to 20 kHz,and showed that the coating does not impact the acoustic performance. The coatings are z-axis conductive and thus obviate the use of masking and allow for flexible integration in the manufacturing process. Waterproof and sweatproof case study: Electronic components were coated with a 1-3 µm low pressure plasma barrier coating and were then assembled into the electronic device. A thin conformal nanocoating can be applied on the assembled product to reduce the ingress of water. These coated devices were then subjected to waterproof testing according to IEC60529. IP ratings from IPX5 to IPX8 were obtained,depending on the device’s design. Short circuit testing was performed on SIR-like PCBs,measuring the current of the circuit when the powered PCB is submersed in water,salt water or artificial sweat. The short circuit current values stayed below 0.1mA,indicating no corrosion on the PCBs (4.7 V,15 minutes submersion time). One of the key drivers of low pressure plasma is the reduced environmental impact compared to traditional wet chemical processes and to the use of more harmful metals. The dry and clean technology has a zero-water consumption,a minimal chemical consumption and a reduced energy consumption,because no heating,drying or curing is needed. This leads to innovative low-pressure plasma coatings that can be used in many applications. The system design and size is adaptable to the dimensions of the products to be coated. In most cases there exists a suited low-pressure plasma treatment with well-dimensioned equipment to help improve protection of electronics.