The fabrication of EPAD PWBs have come about in response to the pursuit of reduction in real estate,demand for improved electrical characteristics and higher durability and reliability needs from the end user. The circuit board uses of ALIVH (Any Layer Interstitial via Hole) technology and thinner components have made the manufacture of EPAD PWBs possible.
The major concerns of fabrication are the thinness of the substrate,thinness of the components and the narrow pitch of the ICs. The substrate thinness will lead to deformation of the PWB. During the SMT process,components can be chipped or cracked due to their thinness and substrate thermal expansion characteristics. The narrow pitch of the ICs (C4-FC) can lead to opens due to the same characteristics of the substrate mentioned earlier.
The Flake on Film process combines several tools and processes to deliver a complete package in the manufacture of EPAD PWBs. The use of a Joint Protection Solder paste adds a bonding agent that coats the surface of the solder to the substrate to minimize cracking during and after reflow. The PWB is mounted to an adhesive backed carrier with suction holes for vacuum support and used for the entire SMT process from printing to reflow. After reflow the carrier is separated from the PWB and reused. The use of a Stamping Unit increases the solder volume on the balls to insure proper wetting and the use of the APC system places the components centered to the print to insure proper contact. The use of the FoF process will increase the overall productivity by controlling all aspects of the SMT line from solder paste to reflow.

As some of the reliability issues and cost associated with tin silver copper solders become more apparent,alternative pb-free solder formulations are being considered. Of particular interest are those that feature little or no silver. However,the thermo-mechanical reliability of these solders is not well known because the main focus has been on improving the mechanical shock/drop performance of the solder interconnects. This study presents preliminary thermal cycling data for a tin nickel copper soldered area array chip scale package. This data is then used to develop a 1st order analytical model to make thermal mechanical fatigue life predictions. The model uses basic distance to neutral point and continuous attach type equations to predict the strain energy dissipated by the solder joint. The energy dissipation is used to make fatigue predictions.

The low Ag solder alloy shows higher drop performance than the high Ag solder alloy in the every kind of package and board combinations. This is related to the ductility of solder and the surface between solder and pad.
The unstable interface exists in IMC,pad material,and solder bulk,aroused by the lattice mismatch,which enables the thermal and physical stress due to the continuous exterior shock to transfer to the IMC interface. Therefore,it must be strongly requested to control solder morphology,and also shape and thickness of IMC for improving the solder reliability.
Furthermore,the solder alloy with high Cu shows good drop performance. We can analogize from this Cu performance that high Cu plays an important role in relieving the brittle surface,such as Ni-P layer,being appeared on electro-less pad after reflow.

Solder joints tend to crack after extended thermal cycling,if the component and the circuit board are CTE mis-matched. Predicting this t-cycle lifetime is critical in optimizing product design or in-service conditions. Predictor models embody cyclic fatigue physics and math,and require inputs of the materials and geometry of the hardware,as well as the thermal conditions of the environment. The output is the predicted number of t-cycles to fail (i.e. to develop electrical-open cracks thru the solder-joint). Several predictor models are in use within the industry. All have strengths and weaknesses,and offer different results. This paper compares several models,rating them for ease of use,and for accuracy against actual test results and against each other. The study uses a round-robin approach; wherein each participant was given the same input data for ten different components,but the actual were withheld until the respective predictor results were in. Also,this paper describes a related study on the ability of each model to perform parametric analyses: i.e. to define the effect on t-cycle life of variations in hardware and environmental conditions. The results offer guidance on selecting models for t-cycle life prediction,as well as on understanding options for improving t-cycle life.

Conductive Anodic Filament(CAF) that is one of the copper migration phenomena becomes significant problem with higher density circuit for printed circuit board.(PCB) In the past CAF property was judged the test vehicle included through hall(TH) (wall to wall 0.3-0.5mm) Recently the circuit of PCB becomes higher density,the evaluation vehicle is requested more narrow TH pitch. So we had studied drilling process ability and the structure of PCB,finally we made evaluation vehicle that can evaluate anti-CAF property by using very narrow pitch TH(wall to wall 0.05-0.10mm) We tested several laminates to use this test vehicle and found out one of high Tg halogen-free FR-4 had an excellent anti-CAF restraining property. Additional our migration test to use extract liquids indicated the different trend between good CAF property’s laminate and bad one.

The purpose of this paper is to demonstrate the value of mathematical modeling of PCB processes. This approach will identify the first order variables that control the process and the relative influence of each of these variables upon the performance of the process. The time constants associated with the variables which define when process equilibrium is achieved are also identified. This information can obviously be used in setting the process. In addition,it will eliminate the need for guess work that normally precedes a DOE in establishing the variables controlling the process. All too often in organizing a DOE first order variables are overlook or minor variables included. Consequently,the results are either meaningless or the time required to carryout the DOE is excessive.
For purposes of this discussion the focus is on an inline,counter flowing processor. These machines are used for a variety of tasks including resist removal,etching and cleaning. In most cases,the machines are multi chambered,with a counter flowing chemical solution. The solution is normally pumped from the chamber to spray nozzles which deliver the solution to the work piece; a PCB panel. After impinging upon the panel the solution drains back into the chamber along with the dissolved superfluous material.

Following the implementation of WEEE legislation,there will be an increasing interest in adopting more sustainable manufacturing processes and materials as targets are increased,and must be achieved without a loss in performance. These innovations may well lead to alternative failure modes. This work studies the performance of specific favoured materials to qualify the failure mechanisms and the effective stress screening regimes,and hence put in place the underpinning work for developing a test method for characterising these materials.
Three systems are evaluated; thermoplastic printed circuit assemblies based on copper-clad polyetherimide,polymer thick film on PET,and direct write copper on PET,were assembled using electrically conductive adhesives and tested using damp heat,dry heat and thermal cycling. All combinations showed very good reliability during the arduous testing. Chip resistor components generally showed less than 5% failures due to increased joint resistance after 1000 hours at 85°C/85%RH or 1000 thermal cycles from –55°C to +125°C. Results from gull-wing SOIC components were less promising but current work is investigating assembly methods to improve reliability of these components. Results were found to be conductive adhesive dependent,but results show that if the right combination of materials is chosen,thermoplastic substrates can be reliable for a wide range of electronics applications. The thermoplastic substrate technology offers great flexibility,for example 3D manufacturing or using the housing as the circuit board are all feasible. The lower energy and cost of manufacture and the improved potential for recycling indicate the value of further work.

REACH presents a new set of direct and indirect risks for article manufacturers,including electronics manufacturers. Direct risks arise from obligations explicitly outlined in the REACH regulation itself – article 7 and article 13. Indirect risks arise from upstream and downstream supply chain ripple effects caused by REACH. These ripple effects will impact article manufacturers,including those who do not import directly into the European Union. Article manufacturers – particularly those with complex products and supply chains – are adopting data-driven risk management approaches to help ensure the future viability and profitability of their products. This presentation presents a framework for electronics manufacturers to identify and mitigate their REACH risks,both direct and indirect. A fact based and systematic approach is outlined,describing what product and supply chain data are needed and how to make decisions based on this data. This paper is based in part on the REACH initiatives underway at several large multinational manufacturers.

Although the official implementation of the EU Restriction of Hazardous Substances (RoHS) directive officially started on July 1,2006,a significant portion of the avionics electronics supply chain began a wide variety of transition actions in the years prior to the implementation deadline in an effort to understand material issues and fabrication concerns. Original Electronic Manufacturers (OEMs) of avionics equipment were either exempt (military products) or excluded (commercial products) from the EU RoHS requirements due to the legislative directive being a single market initiative. However,due to the fact that components used in the avionics industry are largely common with those used in the affected consumer markets,Rockwell Collins had no choice but to begin proactively addressing these issues/concerns back in 2003. The objective of the investigation was to conduct a feasibility study using a functional avionics design to determine printed wiring board design and potential printed wiring assembly issues/concerns when using Pbfree soldering processes/procedures for military avionics products. Environmental Stress Screen (ESS) testing was completed demonstrating that the lead-free military avionics unit was equal to the typical tin/lead military avionics unit test results for the conditions used. This information will be incorporated into the Rockwell Collins Lead-free Control Plan (LFCP) knowledge database as customer information.

Since July 1st 2006,the 2002/95/EC RoHS European directive has forced the electronic industry to switch from Tin-Lead to lead-free soldering alloys for components assembly.
Exemption domains have been defined for highly failure sensitive applications with long service lifetimes like military and aerospace because of the lack of knowledge on long term solder joint reliability in harsh environment. Furthermore,the physical properties of lead-free solder alloys (such as SAC) greatly differ
from those of well known Tin-Lead so that well established accelerated tests can’t be replicated for lead-free to forecast lifetime. These tests are not yet defined and moreover,the statistics of failure mechanisms and rates from the field are not sufficient to manage the reliability risk for many kinds of THALES products.
However,component manufacturers have changed their package finish to comply with the RoHS directive without taking into account AHP equipment makers due to their low share in volume. As a consequence,AHP companies have to face this difficult situation: either manage the obsolescence by component storage
with the great difficulty to forecast the customer demands,or find a solution to use lead free package finishes with standard Tin-Lead alloy,particularly sensitive with all kinds of BGA.
Thales shared a cooperative and ambitious technological program with CELESTICA as a key partner in order to secure an industrial process solution called hereafter SnPb+ (mixed metal assembly).
This paper describes microstructures and thermal cycling performance of lead-free ball grid array and leaded components assembled with Sn-Pb solder using conventional SnPb reflow and reflow with temperature higher than 217°C to melt the lead-free ball and insure a full mixing (the SnPb+ process). The formation of
uniform and non-uniform microstructures as a result of Sn-Ag-Cu (SAC) solder ball dissolution in a molten Sn-Pb solder using a conventional SnPb reflow or melting is studied. The difference in mechanisms and performance of uniform fully mixed and non-uniform partially mixed joints as a response on thermal cycling
at -55°C to 125°C conditions is explored. Additional attention is paid to Sn-Bi finished QFPs and TSOPs. It is shown that Sn-Bi finish with 3 -5% Bi is not responsible for early failures if it is used with Sn-Pb solder.