As an increasing amount of functionality is crammed into today's mobile phones,designers must find ways to save
board area. Two common solutions are the use of embedded passives and the use of smaller (0201) discretes. In
this paper,we examine the cost and area tradeoffs between small discretes and embedded polymer thick resistors.
Three typical mobile phone designs are analyzed using high volume assembly and state of the art board fabrication
techniques for scenarios with either small discretes or polymer thick film (PTF) resistors. The size and cost impacts
of each option are presented.

Part miniaturization is inevitable in surface mount assembly. With each shift to smaller component types,new critical process
parameters emerge and old process parameters become significantly more important. New failure modes emerge and
challenge the manufacturing engineer to adapt existing equipment and design parameters to maximize yield as assemblies
incorporating these miniature components are introduced to current manufacturing processes.
The use of 0201 passive components has significant advantages for PCB designers; part density can be increased and PCB
size can be decreased. In conjunction with incorporating 0201 passive components,microBGA components also are
attractive complements in achieving these goals. However,careful consideration of land layout,surface finish,and solder
stencil apertures must be undertaken to ensure high yield assembly. The manufacturing engineer must ensure that proper
stencil materials and fabrication processes are specified. Existing board support methods must be examined and strategies
modified or improved. Equipment must be examined for the capability to process miniature components. Additional tooling
may be required for both handling and placement of miniature components. Non-standard programming techniques may be
required to increase component handling rates and placement yield.

The continuing demand for smaller,lighter multifunctional portable electronic products has driven the use of miniature
components. To satisfy this demand,01005 chip components are now commercially available. However the implementation
for such tiny components into new products presents some design and assembly process challenges. In this study,a test
vehicle was designed to investigate the effect of PCB pad design on assembly yield. Process capability of the 01005 test
board manufacturing was evaluated. A Design of Experiments (DOE) was used to optimize the solder paste printing based on
3D solder paste inspection. Lead free solder was used for all assembly trials. Several tests were performed to explore the
influences of process parameters on placement accuracy and reflow defects. Through the analysis of experimental results and
post-reflow inspection for assembly defects,recommendations for PCB design and assembly processes are made.

The many challenges with 0201 passive component assembly can be attributed to the solder paste volume,pad design,
aperture design,board finish,type of solder paste,pick-and-place,and reflow profile. A Design-of-Experiment (DOE)
study was carried out to investigate the effects of these parameters on assembly defects and reliability.
The test vehicles consist of pad layouts for 2000-0201 components. Five different test vehicles were used,with the
same pad layout and non-solder mask defined pads,with HASL,ENIG,Pure Tin,Immersion Silver and OSP finish.
Four different pad shapes are designed on each of the test vehicles (rectangular,oval,modified home plate and double
trapezoid). The pad areas for all four shapes are maintained the same. Pads were oriented both in the horizontal and
vertical directions. Electroformed 3-mil and 4.65 mil thick stencils were used for printing the solder paste. The stencil
was designed to obtain two distinct aperture-pad combinations (matched and unmatched). Three solder paste types
(tin-lead and anti-tombstoning and lead free) were used in this investigation.
Two test vehicles assembled for each experimental run,one with resistors and the other with capacitors,provided an
understanding of the difference in the process for these two common passive devices. This paper discusses in detail the
influence of a few key parameters and defects associated with the 0201 component using both leaded and lead-free
solder alloys. A large number of these assemblies were subjected to isothermal aging at 150°C and thermal cycling in
the range of -55 to 100°C to establish their reliability. Shear tests were carried out at various aging intervals up to 500
hours to determine the effects of aging damage on strength relative to virgin assemblies. Similarly,shear test data
generated before and after 1500 cycles and data for ENIG and ImAg are compared. Weibull plots are given for
reliability to establish solder joint fatigue behavior for the lead free assemblies compared to lead-based solder as well
as data correlation for various sets of data. In addition,photomicrographs taken using an optical microscope at
intervals during thermal cycling to establish damage progress are given. Scanning electron microscopy (SEM) analysis
before and after cross sectioning are also performed to reveal microstructural changes and intermetallic formation at
1500 thermal cycles are also included.

Companies not only need to understand the reliability issues with environmental compliance,but also the process of documenting the product’s compliance. Examples will be made – but whose process will withstand scrutiny? The EU is expected to adopt a “due diligence documentation” compliance strategy of proving compliance,China is still undetermined,and many more countries are beginning eco-compliance legislation for electronics products.
The discussion will include information from countries that have provided guidance as to what an audited product will be required to provide when the product is questioned. It will also review what each level of design should be looking for in designing a product.
Documentation should not only include materials declaration forms,but also the business processes used to create compliant product. This includes updating quality manuals,engineering documents,and other business policies and procedures.
This presentation will also touch on the methods expected from countries which are implementing eco-compliance directives and legislation for electronics products; examples include EU,China,Japan,Korea,USA,etc.

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This paper had as an aim to correlate the degree of voiding with reliability. Here the a purpose designed test vehicle was
used,in which seven different solder pastes from three manufacturers were evaluated through a range of reflow profiles. In
spite of strenuous efforts we had the surprising result of only producing limited voiding. Hence,end–users can have a high
degree of confidence that voiding levels in lead-free solder pastes can be kept below the IPC specified maximum of 25% by
area. No paste exhibited voids in any PBGA joint greater than 15% despite attempts to produce higher voiding levels.
Three different voiding levels were produced and samples subsequently subjected to 2000 thermal cycles (-55 to +125oC).
Despite these samples having higher voiding levels than those stipulated for class 3 of the IPC’s BGA Assembly and
Inspection Guidelines,no adverse effect on reliability was seen. The shear strength deterioration during thermal cycling of
chip resistors also with these levels of voiding,was also unaffected.

With the transition to high tin solders,and 100% tin finishes,some concerns have been raised about the possible occurrence
of “Tin Pest”. This paper reviews the historical and recent data collected on this phenomenon. No attempt has been made to
collect and explain thermodynamic data. Various myths are either explained or discounted,including one about “Napoleon’s
buttons”. All linear rate data that could be found is included. A correlation with atomic radii of elemental additives is also
expounded. A summary of analytical techniques which can be used for examining the results of this transformation is also
included.