The use of lead-free (LF) solders as a replacement for traditional tin-lead (SnPb) solders in military and high reliability
applications has a number of technical challenges unique to the industry. The need for a metallurgically stable solder joint
under harsh environmental conditions,high stress and shear loading,and long term storage presents a set of requirements that
are significantly different from most commercial applications. It is well documented that processing conditions during
soldering can significantly affect the microstructure and reliability of the joint. Due to the low volume and long life cycle of
military and aerospace electronic assemblies,repair of components is widely employed. While methods for repairing
assemblies using SnPb solders are well established,limited data is available for re -work and repair of LF solder processing,
especially when the resulting joint is a combination of SnPb and LF solders. In this study the influence of repair processing
conditions on the microstructure of LF solders was investigated. Processing parameters such as soldering conditions and
solder composition were used to simulate manufacturing operations. Temperature cycling of components soldered to printed
circuit boards between -55°C and +125°C with SnPb,LF,and mixtures of SnPb and LF solders was performed. Analyses of
the phases present,chemical composition and microstructure of the solder joints before and after temperature cycling were
conducted using optical and electron microscopy to correlate processing conditions to the resulting microstructure. Shear
testing of surface mounted capacitors prior to and after temperature cycling demonstrated a significant drop in shear strength
after temperature cycling. Implications of processing conditions on the reliability and long term stability of the solder joints
will be discussed.

In contrast to electroless copper,direct metallization processes are inherently less expensive to operate,more environmental
friendly,requires less floor space and are more efficient. Among the three common direct metallization methods,namely
carbon based,conductive polymer based and palladium based,carbon based is the most attractive option,with the lowest cost
and ‘greenest’ ingredients. However,despite past predictions to the contrary,electroless copper processes are still the most
widely accepted through-hole metallization technologies in today’s market.
In their infancies,implementation of direct plate processes at PWB manufacturers produced panels of questionable reliability.
This led many major OEMs to write specifications refusing to accept any alternatives to conventional electroless copper for
through-hole metallization in PWB fabrication. However,despite the lack of official acceptance by certain OEMs,carbonbased
direct metallization is widely used by PWB fabricators where lower costs and environmental concerns are the
industries major drivers.
This paper,focusing on higher technology applications,provides PWB fabricators and OEMs with current up to date
comprehensive data on improvements made to the technical capabilities and reliability of this unique carbon-based direct
metallization system. Additionally,the data supports the acceptance of this direct metallization technology as a viable
alternative to conventional electroless copper processes.

This paper will review eductor agitation systems at PWB installations to improve the electroplating of printed circuit boards.
Significant environmental and productivity improvements have been realized through the use of carefully engineered clusters
of eductor nozzles. Design parameters,materials of construction,turnover rates and pump selection will be discussed.
Reported benefits such as reduced airborne emissions,faster and more uniform plating rates and prevention of solution
stratification to improve filtration will be reviewed.

The use of acid copper plating process for via-filling effectively forms interlayer connection in build-up PWBs with
high-density interconnections. However,in the case of copper film deposited in a bath,which is greatly dependent on the
effects of additives like via-filling technique,the drop in mechanical properties and the increase in stress in electro-deposits
due to co-deposition of the additives are likely weaknesses. In view of such weaknesses,we concentrated our study on the
mechanical properties of the copper films plated in two types of conformal acid copper plating baths that have been in use for
some time and two types of acid copper plating baths for via-filling.
As a result,selection of suitable additives was confirmed to be of great importance for the acid copper plating bath for
via-filling. The use of the additives that easily deposit with copper was likely to cause drop in mechanical properties of the
film. On the other hand,the fact that the acid copper plating process for via-filling nevertheless deposits a film comparable to
that out of the recognized conformal type acid copper plating bath in the use of the most suitable additives was confirmed.

Have you ever been confused after you have read two or three different roadmaps and even though they were supposedly
mapping the same attribute in the same time periods,the numbers in the cells were different? Do you often wonder,“Do
these people ever talk to each other”?
Interestingly,even though different all of the roadmaps may be correct. The following list some of the reasons for the
differences and explains the uniqueness of the individual roadmaps.
Industry wide technology roadmapping,which is a fairly new activity in the U.S.,is believed to have been started in Detroit
in the late 80’s when the automotive industry asked their suppliers to present roadmaps of their future products. The focus of
many of these presentations was cost reduction not necessarily technology as the U.S. auto industry was in the middle of
severe cost cutting activities to increase their competitiveness.
There are now numerous national roadmaps. The steel industry,the aluminum industry,and the forging and casting industries
all have published technology roadmaps. In the electronics industry there is also a large number of roadmaps: The National
Electronics Manufacturing Initiative (NEMI) roadmap,The Association Connecting Electronics Industries (IPC) roadmap,
The Semiconductor Industry Association (SIA) roadmap,and the Japanese JISSO roadmap.
Gary S. Vasilash,as Editor - In – Chief of Automotive Manufacturing & Production Magazine once made two broad
statements supporting roadmaps. The first is,roadmaps provide a view to all levels of an organization that goes beyond the
immediate fires that need to be put out and keeping new fires from starting. The second comment was that roadmaps identify
areas where collaboration may be needed in order to achieve leapfrog,not natural incremental,development.
Mr. Ray Kammer,former Director National Institute of Standards and Technology has said “We at NIST love roadmaps…
Roadmaps help us guide our investments and to allocate our resources in accordance with U.S. industry’s priorities. And the
more detailed the roadmaps the better…”
Kammer also said,“The need for two way communication has not subsided. Technology and science are moving too fast.
Global competitive conditions are too fluid. Opportunities are too fleeting,and the technology gaps we must bridge are too
wide to leave communication to chance,or even to individual initiative. Both government and industry stand to gain from a
more systematic and more proactive approach to surveying the technology landscape in electronics.”
“From the government perspective,an example that pops quickly to mind is defense technology. As the Pentagon continues
to transition toward greater reliance on a commercial technology base,there is an even greater need for regular
communication between government and industry. Roadmaps facilitate this communication.”
The Defense department must be alert to trends and developments and to basic research supporting the entire scope of
electronic technologies. It must understand the manufacturing capabilities that underlie these technologies. It also must be
quick to identify research and technology gaps—specialized needs likely to go unaddressed in the commercial sector.
National Technology Roadmaps facilitate this need.

A unified European roadmap for PWBs does not exist today. It is also most unlikely that a unified roadmap will available in a
foreseeable future time. However,the EIPC has worked together with many European companies and association to define
trends in technology based on the future needs of the industry. This paper will report on some of the trends that are included
in European company roadmaps and the HotCar project. More details have been documented in the European Technology
and Trend Report that has been put together by the German GMM VDE/VDI,the DGO,FED,ZVEI,the EITI as well as the
European Institute of Printed Circuit Boards. Leading companies involved in design of electronic equipment supported this
report. Also PCB fabricators,PCB assemblers as well as materials suppliers for PWBs and companies that develop latest
fabrication methods used to manufacture state-of-the-art electronic equipment. This paper will provide a snap shot on
developments that will impact the European Roadmap for PCBs and will help to guide electronic engineers to select the new
PCB technologies for advanced electronic devices.

Japan has a long history of publishing very important technology roadmaps. Some of the Japanese roadmaps published in the
past are:
JPCA Roadmaps
Report on the Technology Roadmap for Advanced Systems Integration and Packaging English version 1998,translated by IPC.What Makes Dreams Come True? A roadmap of microvia technology published in 1998 JIEP Roadmaps
The Technology Roadmap for Electronic Packaging Technology in Japan (1999 – 2010) English version September 1998,translated by SEMI EIAJ / (JIETA – Japan Electronics and Information Technology Industries Association) Report on Semiconductor Packaging Technologies,December 1996
Multi Media Vision 2005,March 1997 Report on MCM / KND Packaging Technologies,October 1997 In 1999 Japanese technologists decided to go to “JISSO”. JISSO is a made up word that means the total system integration. It
encompasses all relevant technologies,such as semiconductor ICs and their packages,other electronic components,PWB,materials,interconnecting structures,environmental protection,and system design.
This was a major decision on the part of the Japanese technology organizations. In 1999 and again in 2001 and 2003 there
has been a JISSO technology roadmap.
The first JISSO roadmap was published in 1999. The Japanese version was published in August 1999 and an English version followed in September 2000. The second JISSO roadmap was then published in April of 2001. This roadmap was also published in English. The 2003 JISSO roadmap was only published in Japanese.

With the objective of developing high thermal conductive laminates capable of being used as high current-carrying wiring
boards for automotive and industrial applications,we identified the optimum blending method and optimum fillers for
biphenyl-type epoxy resin that possesses high thermal conductivity,and studied laminating conditions. As a result,we
established a method to achieve homogeneous dispersion and we manufactured prepregs that are devoid of coating
irregularities. In addition,we found fillers capable of achieving a maximum thermal conductivity of 7.5 W/m·K and thereby
enhanced both thermal conductivity and insulation resistance. Although copper-foil peel strength was reduced,we increased
its strength by means of the roughening of rolled copper. In addition,we were able to determine molding conditions such as
press temperature.

Recent increasing demand for miniaturization and multi-functionality of electronic devices has lead to higher PWBs circuit
density design,requiring thinner insulation layers,smaller via holes and finer wiring lines than ever before. So that the
prepregs used to compose PWBs require better drilling ability and higher insulation reliability in additions to the demands of
thinner fabric. To meet these requirements,ASAHI-SCHWEBEL has developed a new type of ultra-thin prepreg capable of
forming as thin as 20µm thick single insulation layer by using 10µm thick glass fabric obtained by our proprietary uniform
glass fabric spreading method. Furthermore,we have succeeded to render UV-YAG laser drilling ability to resin/glass fabric
prepregs without impairing problematic hole-to- hole insulation reliability by chemically finishing the glass fabric with
inorganic nano-particles. The values achieved are 50µm via hole capability and no failure after 350 hours at 121?,85RH%
under 5 volts applied with hole -to- hole length of less than 150µm. The mechanical properties of the developed prepregs,
especially rigidity and dimensional stability,are found to be much better than those of other organic substrates. We believe
that this new type of prepreg is best suited for not only current but also future PWBs material,such as for buried capacitor
laminates containing high dielectric constant compounds.

A recent trend of increasing circuit density,particularly in the areas of plastic packages and multi-layer boards,has resulted in
ceaseless demand of improved mechanical properties for laminates with improved quality and reduced cost. In general,
mechanical properties of laminates composed of glass fabrics and thermosetting resin are strongly dependent on the resin
shrinkage during thermal cure,asymmetrical structure of the laminates and inhomogeneous structure of the glass fabric made
by glass yarns having twist,a presumably main cause of internal strain in the glass fabrics. We conducted in depth studies
intended to correlate the characteristics of glass fabrics to the mechanical performance of laminates,and have succeeded in
developing new glass fabrics using zero twist yarn. We have combined it with our uniquely developed “MS process”,by
which a homogeneous distribution of glass fibers in the laminates can be obtained quite easily. Eliminating internal strain by
use of twist-free yarn and MS process,these new laminates have proved not only to reduce warp and twist by as much as
50% compared to conventional laminates,but also to improve mechanical properties such as dimensional stability with low
standard deviation and C.T.E. by ca. 2ppm. In addition,the new laminates have exhibited excellent micro-diameter drilling
capability,such as laser drilling and mechanical drilling with 0.1mm or less in diameter,with less drill bit breakage and
uniform via side-wall.