Overview of Embedded Technology
Last spring at EXPO,embedded passives came into its own by being escalated from a sub-committee with 4 task groups to a general committee with 4 sub-committees. Dave McGregor of Dupont now chairs the new general committee D-50 with Richard Snogren of Bristlecone as vice chair. Under that we have:
D-51 Embedded Devices Design Sub-committee
Chair – Kim Fjeldsted of Arrowsmith
Chair – Richard Snogren of Bristlecone
D-52 Embedded Component Materials Sub-committee
Chair – Dave McGregor of Dupont
Vice chair – Rocky Hilburn of Gould
D-53 Embedded Devices Performance Sub-committee
Chair – Michael Luke of Raytheon
Vice chair – Sidney Cox of Dupont
D-54 Embedded Devices Test Methods Sub-committee
Chair – Jan Obrzut of NIST
Chair – Robert Croswell of Motorola
Sub-committee progress to date has been significant.
The D-51 design sub-committee had decided some time ago to start with a design guideline which is now known as IPC 2316,“Design Guide for Embedded Passive Device Printed Boards”. It follows the path of the HDI and microvia standards development of a few years ago. The design guideline is in its final “working draft” stage,ready to be submitted for “final draft for review” at the Fall 2005 Works meeting and will soon be sent out for “proposal for ballot”. The design standard activity will start up soon after the guideline goes for ballot.
The D-52 materials sub-committee has created two documents. IPC 4811 “Resistor Materials for Rigid and Multilayer Printed Circuit Boards” is currently in its 5th working draft status and IPC 4821 “Capacitor Materials for Rigid and Multilayer Printed Circuit Boards” is in the “proposal for ballot” status.
The D-53 performance sub-committee has in the early working draft stage,IPC 6017 “Qualification and Performance Specification for Printed Boards Utilizing Embedded Devices”.
Finally,the D-54 test methods sub-committee has created and received approval for IPC TM650 Test Method 2.5.5.10 “High Frequency Testing to Determine Permittivity and Loss Tangent of Embedded Passive Materials”.
Test Method 2.5.7.2 “Dielectric withstanding Voltage for Thin Embedded Capacitor Layers for Printed Circuit Boards (PCBs)” is in working draft number 3 status.
Underwriters Laboratories has continued its participation in committee and sub-committee activities.