New Improved Polyimides for Increased Reliability

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A Design of Experiment (DOE) was conducted to determine the best filler,or combination of fillers that would offer the best
reduction of CTE expansion from 50oC to 260o C without compromising electrical,chemical,mechanical or thermal
performance of the base Polyimide resin. Our study here shows that a unique combination of fillers can reduce the percent zaxis
expansion of a V0 Polyimide from 1.45% total expansion to 1.28% better than any single type of filler. Thus offering
higher reliability in Printed Wiring Board (PWB) applications that continuously operate in conditions of severe thermal
cycling.

Author(s)
David Bedner,Gayle Baker,William Varnell
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Use of Novel Adhesive-lined CCL Material in Single-pressed Multi-layer Circuit Boards with Inner Via-Holes in all Layers

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This newly developed material and process enable the manufacturing,using a single pressing process,of multi-layer circuit
boards with inner via-holes in every layer. Because this material utilizes conventional circuit board materials for its structural
components,it not only provides proven high reliability and ease of circuit assembly,but also offers a short lead-time and high
production yield due to adoption of the following processes used during the manufacture of conventional printed circuit boards.
§ Use of a mu lti-layer substrate consisting of copper foil,glass-cloth-based insulation layer,adhesive layer,and cover film
§ Application of an etching process to the copper foil to produce a fine-patterned circuit
§ Generation of blind via -holes using laser processing and hole cleaning
§ Formation of via-bumps by filling metal-based paste and removing the cover film
§ A multi-layer circuit board with inner via-holes in all layers can be produced by aligning the insulation layers and pressing
them together in a single operation.
The materials used in this process require a variety of key technologies that enable laser processing,dimensional control,
conductive paste filling etc. This paper describes these techniques and includes an example of the production of a multi-layer
circuit board in a single pressing operation,followed by reliability evaluation results for the whole circuit board.

Author(s)
Daisuke Kanaya,Shuji Maeda,Keiko Kashihara,Kenji Ogasawara
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Qualification of ALIVH-G Boards for Handset Assembly

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The trends of increased functionality and reduced size of portable wireless products,such as handsets; PDAs are demanding
increased routing densities for printed circuit boards. The handheld wireless product market place demands products that are
small,thin,low-cost and lightweight and improved user interfaces. In addition,the convergence of handheld wireless phones
with palmtop computers and Internet appliances is accelerating the need for functional circuits designed with smallest,lowcost
technology.
Historically,the industry has met this challenge through high density interconnect technology and increased silicon
integration and component miniaturization. Microvia high density interconnect (HDI) also known as build up technology,is
one method for constructing circuit boards with high routing density demands.1
For HDI board,vias can be formed using unreinforced dielectric such as Resin Coated Foil (RCF),using processing
techniques such as laser drilling or photoimaging. The vias are then metallized using electroless copper/electrolytic plating.
The advantage of the HDI construction is the ability to create smaller vias (6 mils) and via pad sizes. This enables higher
routing density,lower metal count,reduced board area and increased functionality as compared to conventional boards. HDI
improves the wiring density by using build up microvias in the outer layers. However there is still dead space where
components cannot be mounted and lines cannot be wired,because of staggered via hole structure.
On the other hand,ALIVH-G (Any Layer Interstitial via Hole) needs no through hole. This is because any two layers are
electrically connected by IVH (Interstitial via Hole). The IVH can be placed in any position. Since there is no through hole
that disturbs interconnections between components,the dead space becomes reduced and the wiring capability is improved
greatly.2
Past board technologies used stacked microvias on the outer layers. Current board designs use ALIVH-G technology. These
vias are laser drilled and the interconnection technology used is conductive copper paste. The typical design rule is
Lines/Space 100/100 micron and Via /Land is 200/400 microns. ALIVH-G technology makes a lightweight substrate (less
than 100g)
The paper presents the evaluation conducted to ensure the stability of the laminate and microvias through the double sided
reflow process. This was evaluated as a part of the phone product qualification build.

Author(s)
Mumtaz Y. Bora
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Next Generation High Density Build-Up PKG Substrate

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In recent years,along with the further progress of network systems,mobile communication systems and high performance
servers printed wiring boards (PWBs),which are key components in these products,are increasing in importance,and are
required for technology innovation.
Especially,the substrates in the field of high-end ASICs require more high density and high performance,and CSP and
Module substrates in the field of mobile application require more high density and downsizing. The demands for the substrate
have been steadily becoming more and more stringent.
This paper introduces a new multi-layer PKG substrate that has been developed to meet these market trends,and has better
features than the conventional build-up substrate. This new multi layer PKG substrate has no core material and is a so-called
coreless structure composed of only high-density build-up layers. This substrate is produced with our original manufacturing
process and has the following features: 1) Light weight (70% reduction),Thin-thickness (less than half),and High density 2)
High reliability 3) Good productivity 4) Green material.

Author(s)
Takashi Shuto,Kenji Takano,Kazuya Arai,Munekazu Shibata,Junichi Kanai,Kaoru Sugimoto
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Corrosion Factor and Effects of Tin - Zinc Lead-Free Solder on Copper Substrate in Environmental Tests

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We coated copper substrate with tin-zinc lead-free solder (Sn-9Zn and Sn-8Zn-3Bi),and then we performed the following
corrosion tests: the salt mist test,the gas corrosion test,and the weathering test. Following the tests,we visually inspected
specimen surfaces and cross-sections to determine the causes of corrosion and the extent of the corrosion to the base
substrate.
By the surface condition of the Sn-Zn solder following the various tests,it was found that corrosive substances in the
environment (such as sulfur and chlorine) reacted with the Zn in the solder to form corrosive products on the surface of the
solder. After 18 months of the weathering test,cross-sectional analysis revealed that the Sn-Zn solder had been oxidized to a
depth of 10um. However,the copper substrate underneath showed no evidence of corrosion. On the other hand,conventional
Sn-Pb eutectic solder was oxidized to a depth of 20um,and the copper substrate also showed corrosion. We hypothesize that
the corrosion of Zn in the Sn-Zn solder yielded a sacrificial corrosion effect by forming an intermetallic compound layer
(Sn-Zn layer) between the base substrate and the solder. As a result,Sn-Zn solders exhibited corrosion resistance far superior
to that of conventional Sn-Pb eutectic solder.

Author(s)
Hirokazu Tanaka
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

The Use of SAC Solder and Pb-Free Lead Materials in the Repair Scenario

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Much work has been done involving the introduction of RoHS and WEEE Directives across the European Union and the
world. Although the use of Pb is limited in new products and equipment,older Pb-containing materials can continue to be
used for repair of existing systems. As time progresses,these older Pb-containing materials will need to be repaired using Pbfree
components and solders. This paper addresses the concerns of repair centers,which must rework these boards using Pbfree
components and materials.

Author(s)
Mark Woolley,Jae Choi
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Perspectives on Repaired Lead-Free Solder Joints

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The use of lead-free (LF) solders as a replacement for traditional tin-lead (SnPb) solders in military and high reliability
applications has a number of technical challenges unique to the industry. The need for a metallurgically stable solder joint
under harsh environmental conditions,high stress and shear loading,and long term storage presents a set of requirements that
are significantly different from most commercial applications. It is well documented that processing conditions during
soldering can significantly affect the microstructure and reliability of the joint. Due to the low volume and long life cycle of
military and aerospace electronic assemblies,repair of components is widely employed. While methods for repairing
assemblies using SnPb solders are well established,limited data is available for re -work and repair of LF solder processing,
especially when the resulting joint is a combination of SnPb and LF solders. In this study the influence of repair processing
conditions on the microstructure of LF solders was investigated. Processing parameters such as soldering conditions and
solder composition were used to simulate manufacturing operations. Temperature cycling of components soldered to printed
circuit boards between -55°C and +125°C with SnPb,LF,and mixtures of SnPb and LF solders was performed. Analyses of
the phases present,chemical composition and microstructure of the solder joints before and after temperature cycling were
conducted using optical and electron microscopy to correlate processing conditions to the resulting microstructure. Shear
testing of surface mounted capacitors prior to and after temperature cycling demonstrated a significant drop in shear strength
after temperature cycling. Implications of processing conditions on the reliability and long term stability of the solder joints
will be discussed.

Author(s)
Richard Colfax,Matthew O’Keefe,Patricia Amick,David Kleine,Steve Vetter,Dale Murry
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

'Bridging the Gap’ – Technical Capabilities of a Direct Plate PTH Process

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In contrast to electroless copper,direct metallization processes are inherently less expensive to operate,more environmental
friendly,requires less floor space and are more efficient. Among the three common direct metallization methods,namely
carbon based,conductive polymer based and palladium based,carbon based is the most attractive option,with the lowest cost
and ‘greenest’ ingredients. However,despite past predictions to the contrary,electroless copper processes are still the most
widely accepted through-hole metallization technologies in today’s market.
In their infancies,implementation of direct plate processes at PWB manufacturers produced panels of questionable reliability.
This led many major OEMs to write specifications refusing to accept any alternatives to conventional electroless copper for
through-hole metallization in PWB fabrication. However,despite the lack of official acceptance by certain OEMs,carbonbased
direct metallization is widely used by PWB fabricators where lower costs and environmental concerns are the
industries major drivers.
This paper,focusing on higher technology applications,provides PWB fabricators and OEMs with current up to date
comprehensive data on improvements made to the technical capabilities and reliability of this unique carbon-based direct
metallization system. Additionally,the data supports the acceptance of this direct metallization technology as a viable
alternative to conventional electroless copper processes.

Author(s)
Richard Retallick,Hyunjung Lee,Ying (Judy) Ding,Timothy Spencer
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Improving Printed Circuit Board Plating with Eductor Agitation

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This paper will review eductor agitation systems at PWB installations to improve the electroplating of printed circuit boards.
Significant environmental and productivity improvements have been realized through the use of carefully engineered clusters
of eductor nozzles. Design parameters,materials of construction,turnover rates and pump selection will be discussed.
Reported benefits such as reduced airborne emissions,faster and more uniform plating rates and prevention of solution
stratification to improve filtration will be reviewed.

Author(s)
Charles Schultz
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005

Characterization of Acid Copper Plating Solution for Via-Filling

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The use of acid copper plating process for via-filling effectively forms interlayer connection in build-up PWBs with
high-density interconnections. However,in the case of copper film deposited in a bath,which is greatly dependent on the
effects of additives like via-filling technique,the drop in mechanical properties and the increase in stress in electro-deposits
due to co-deposition of the additives are likely weaknesses. In view of such weaknesses,we concentrated our study on the
mechanical properties of the copper films plated in two types of conformal acid copper plating baths that have been in use for
some time and two types of acid copper plating baths for via-filling.
As a result,selection of suitable additives was confirmed to be of great importance for the acid copper plating bath for
via-filling. The use of the additives that easily deposit with copper was likely to cause drop in mechanical properties of the
film. On the other hand,the fact that the acid copper plating process for via-filling nevertheless deposits a film comparable to
that out of the recognized conformal type acid copper plating bath in the use of the most suitable additives was confirmed.

Author(s)
Hideki Hagiwara,Hideo Homma,Ryoichi Kimizuka
Resource Type
Technical Paper
Event
IPC APEX EXPO 2005