The American Competitiveness Institute (ACI) performed a series of Environmental Stress Tests for the Joint Group of
Pollution Prevention / Joint Council of Aging Aircraft (JG-PP / JCAA) Lead Free Soldering Program. The objective was to
determine if Lead Free soldered hardware was equivalent to or better than its Tin Lead (SnPb) counterpart. The program’s
test vehicle was manufactured by BAE Systems in Irvine,Texas. The JG-PP / JCAA test vehicle was soldered with Tin Lead
(SnPb) as a baseline,Tin Silver Copper (95.5Sn3.9Ag0.6Cu or SAC),Tin Silver Copper Bismuth ((92.3Sn3.4Ag1.0Cu3.3Bi
or SACB),and stabilized Tin Copper (99.3Sn0.7Cu0.05Ni).
The Salt Atmosphere test was performed in accordance to ASTM B117 Test Method for 48 hours. The Temperature
Humidity test followed the procedure MIL-STD 810F; Test Method 507.4. In both tests,no failures were found that could be
attributed to the solder joints. Therefore,the Tin Lead and Lead Free soldered hardware can be considered equivalent.
Two types of Mechanical Shock tests were performed. The first Mechanical Shock test was performed using the test
procedure MIL-STD 810F; Method 516.5; Procedure 1. The test was performed on all 3 axes. 2 components soldered with
SACB failed the tests. The balance of the SnPb and Lead Free soldered components passed this mechanical shock test with
no failures.
The second Mechanical Shock test was performed to a modified version of MIL-STD 810F; Method 516.5; Procedure 1,
where the test vehicle was tested in the Z-Direction,at increasing levels to failure. The mechanical shock levels reached in
this test were above those in the first mechanical shock test. Across all test levels and component types,the SnPb soldered
hardware performed comparable or better than the SAC and the SACB soldered hardware.

Vibration testing was conducted by Boeing Phantom Works (Seattle) for the Joint Council on Aging Aircraft/Joint Group on
Pollution Prevention (JCAA/JG-PP) No-Lead Solder Project. The JCAA/JG-PP Consortium is the first group to test the
reliability of lead-free solder joints against the requirements of the aerospace/military community.
A complete modal analysis was conducted on one test vehicle (the “Pathfinder” PWA) using a laser vibrometer system. This
system measured velocities,accelerations and displacements of the PWA during the vibration test. The laser vibrometer data
was used to determine the resonant frequencies of the “Pathfinder” PWA and the actual deflection shapes of the PWA during
test. In addition,the strains generated during a 1 G sine dwell were calculated for 1189 points on the “Pathfinder” PWA.
After completion of the modal analysis,thirty test vehicles (in two batches of 15 test vehicles each) were subjected to the
vibration test conditions. The input power spectral density was increased during the test at 60 minute intervals in an effort to
fail as many components as possible within the time allotted for the test.
The solder joints on the components were electrically monitored using event detectors and any solder joint failures were
recorded on a Labview-based data collection system. The time to failure of a given component attached with SnPb solder
was then compared to the time to failure of the same component attached with lead-free solders.
After completion of the testing,all of the test vehicles were visually inspected. Broken component leads and other unwanted
failure modes were documented.

Bare printed wiring board materials require changes from today’s typical standard dicy cured FR4 materials in order to
support lead-free assembly. The High Density Packaging User’s Group has completed a study of via reliability through airto-
air thermal cycling after various SnPb and lead-free reflow profiles. Six different materials,with different numbers of
reflow profiles were studied in this test through 6000 accelerated thermal cycles. Data from this testing will be presented that
clearly shows that all materials claimed to be lead-free compatible are not created equal. A review of relevant material
properties vs. the results will also be attempted.

The Pb-free solder interconnect reliability performance of a wide variety of common SMT component types was measured in
an IPC-9701 TC1 thermal cycle (0-100°C / 40 min cycle). Seventeen different Pb-free SMT components were evaluated,
including PBGAs,CBGAs,CCGAs,power modules,QFPs,PLCCs,CSPs,chip capacitors and resistors. All were attached to a
six layer PCB using SAC387 solder paste according to the HDPug GPLF defined assembly process. This study specifically
compares the reliability behavior of these various component types when subjected to expected Pb-free assembly process
extremes such as minimum peak reflow temperature and extended reflow soak times. Microstructural features of as-assembled
SAC solder connections are first explored. Failure data is reported for the various component types and assembly conditions.
All SAC solder thermal cycling data was collected along with eutectic SnPb solder controls.

Elevated SMT reflow temperatures for Pb-free soldering are placing excessive thermal demands on certain families of
electronic components. The High Density Package Users Group,HDPUG,Consortium conducted an extensive study on
optimizing the time / temperature profile for reflow to reduce temperature variations from high to low thermal mass
components and to identify the minimum peak temperatures that will produce acceptable solder joints. This paper details the
preliminary findings of profile characterization work for a range of PCB design types,assessing the impact of adjusting both
time and temperatures. Development of thermal profiles for rework of SMT components is also included. Results of
metallurgical analysis are given to support provisional recommendations on minimum peak temperature requirements. These
were subsequently used for the build of the GPLF (General Purpose Lead Free) test vehicle to assess reliability of Sn/Ag/Cu
solder joints produced at the limits of the process window.

Many words have been written about the impending lead free transition,during this period of frantic discovery lots has
been communicated about the reflow and alloy concerns; But the print process,which lets face it is the 1st process that
adds value,is often over looked but this is where a process can be made or broke. Much has been documented about the
differences of Lead free materials versus Lead rich materials; Mainly the discussion goes along the lines of questioning
the self-centring capability and the wetting characteristics. This leads onto questions such as,“What should I do with my
aperture design”,“Will I see more assembly defects?” This paper will look at these questions plus others such as what
happens if the process window is intentionally violated.

A brand name Pb-free solder paste made with three different sizes of solder paste spheres was studied. The soldering ability
of Types III,IV and V solder paste in terms of opens,shorts,solder spread,solder balls,solder beads and tombstoning was
examined using two different types of test boards.

Rarely does a day pass by without a discussion centered on lead free manufacturing and it’s future impact on global
electronics assembly. The WEEE and RoHS directives drafted in January 2003 with a focus on electronic product recycling
and a ban of six hazardous substances in electronics products has created quite an industry buzz. European member states are
responsible for passing their own legislation making the directives law and binding in their respective countries. The WEEE
directive has slipped implementation in many countries as establishing recycling logistics appears to be more difficult than
first thought. On the other hand,RoHS compliance is moving along at a fast pace with many companies finding suitable
solutions and replacements for Sn/Pb solders. Engineers are now faced with optimizing the process variables around these
new material properties. Many recent studies have analyzed the effect / impact of Lead Free solder paste implementation on a
multitude of SMT processes including solder joint strength,wetability of SMD leads as well as pads on the PCB with a
variety of board finishes and solder paste compositions. Hardly a day goes by where you don’t see an announcement about a
new Lead Free implementation Workshop.
This study will focus on the stencil and squeegee blade and their impact on the Lead Free solder paste-printing process. Three
different stencils,three different Lead Free solder pastes,and five different squeegee blades are included in the study. The
Benchmarker II stencil test pattern was used as a tool in the evaluation. Of particular interest is the surface roughness /
smoothness of the stencil squeegee side surface. It is demonstrated that this surface has a dramatic influence on the minimum
squeegee pressure for metal squeegee blades to achieve clean wiping of the Lead Free solder paste from the stencil surface. In
addition to the surface finish of the stencil it was found that the type of Lead Free solder paste and the type of metal squeegee
blade used also played a roll in determining the minimum squeegee pressure to achieve clean wiping of the solder paste.

The trend towards miniaturization has been with us for quite a while,with marketing departments pressuring for ever-smaller
dimensions for everything. A question that arises frequently in this context is as follows: Can we accommodate these
requirements by offering miniaturization in three dimensions rather than the conventional two in PCB design? A positive
answer to this question is now provided through the utilization of embedded passive technology.
In this paper,we present a full flow in comparison between a conventional and 3-D board having the same functionality. The
first board is a conventional two dimensional board 780mm x 290mm large,using 1.6mm FR4 in four layers while the
second board is three dimensional,330mm x 366mm large also using 1.6mm FR4 in four layers. The paper includes the
details of the decisions taken,the design,layout,simulation,and MRP,as well as considerations of purchasing,materials,
assembly,yields,rework,reliability,all summarized in terms of a cost benefit analysis. Additional benefits of this technology
are shown to be the possible reduction in size of some of the testing fixtures such as cycling ovens and testbenches.

Buried sheet capacitance has been used for sometime in sophisticated PCB designs. The ZBC 2000TM patented by the
Sanmina Corporation is a familiar example. Conceptually,this product consists of one or more innerlayers with a two-mil
FR4 core. Each such innerlayer forms a sheet capacitor of approximately 500 pico-Farads per square inch. The original
purpose of the technology was to replace the surface by-pass capacities with an internal alternative and thereby provide
additional outerlayer real estate for routing and active components. Later it was also found that a properly designed buried
sheet capacitor is an effective method for containing EMI radiation.
The purpose of this paper is to analytically investigate the dynamic properties of buried capacitors when incorporated into a
PCB board. Techniques for improving the performance are also examined.