In the present study,a simplified analysis methodology is used to evaluate thermal fatigue damage of solder joints of
a leadless ceramic chip carrier (LCCC) or a leadless chip capacitor/resistor (LCC/LCR). During temperature
cycling,only the solder joints experience elastic-plastic deformation while the rest of the assembly components,
such as the package case and printed wiring board,are assumed only to be elastically deformed. In the analysis,the
equilibrium of displacements of electronic package assembly is used to calculate the solder strain during temperature
cycling. This solder strain is then iterated according to the stress-strain behavior of solder until the solder strain is
consistent with the effective elastic modulus used in the analysis.
A thermal fatigue life prediction model,evolved from an empirically derived formula with some modifications,is
established. The analytical results,previously obtained from an experimentally validated fatigue life prediction
model and finite element analysis (FEA),combined with the derived solder strain are used to calibrate the proposed
model. In addition,the predicted lives calculated from the calibrated model match test results of 20-,28-,and 68-pin
LCCC packages,provided by JPL/NASA. Since this calibrated model is remarkably simple compared to the
evaluation with FEA,it is therefore recommended that this model serve as an effective tool for making a preliminary
determination of the solder joint integrity of LCCC/LCC/LCR during temperature cycling.

The energy consumed during the reflow assembly of printed wiring board assemblies is expected to be environmentally
significant within the solder product life-cycle. Wide differences in the melting temperatures of lead and lead-free solders
alternatives suggests that there may be large and important tradeoffs associated with the selection of solder and its ultimate
impact on the environment. Preliminary results of testing,conducted as part of an overall life-cycle assessment of lead and
lead free solders,are presented in this paper and then compared to previously conducted studies. Life-cycle impacts
associated the test data are also presented.
Testing results indicate that energy consumption can vary by as much as 40 percent across alternative solders,with the
National Electronics Manufacturing Initiative (NEMI) recommended Sn/Ag/Cu alloy consuming eight percent more energy
than eutectic Sn/Pb,and the Sn/Ag/Bi alloy consuming as much as 32 percent less energy. Although absolute energy
consumption values during this test were higher than other studies,relative energy differences between solder types strongly
agreed with those of previous studies. Finally,the environmental impacts associated with the energy consumed during reflow
assembly were demonstrated to be significant when compared energy use in upstream life-cycle processes.

Circuit pack assembly involves the use of numerous materials and processes of environmental concern,including
electronic components and associated assembly operations. It is necessary to be able to evaluate these in a robust,
consistent manner to provide a basis for comparison and to guide product design and project investment decisions.
Companies worldwide are seeking to include sustainability in their business and operating plans as a basis for
environmental evaluation,but are struggling to move beyond vague,subjective measures. The Sustainability Target
Method (STM) provides a practical sustainability target for individual businesses and products based on
environmental impact and market value. This paper applies the STM to evaluate selected types of circuit pack
assemblies utilized in state-of-the-art telecommunications switching equipment. The analysis includes both the
product supply line and assembly processes. The results demonstrate the product elements and processes that cause
the most environmental impact and,from a sustainability perspective,the product advancements that are occurring
due to evolving telecommunications technology and the economic value it provides.

Much of the environmental emphasis is currently on elimination of undesirable elements and compounds such as
lead or halogens. The unintended consequences are huge in terms of diversion of resources (at a time of great strain
in the electronics industry),increased energy usage,processing and performance challenges and the creation of new
questionable waste streams.
Long-term the solution for the electronics industry will be takeback and reuse or recycling. There are already models
for this in automobiles and packaging in Europe,and many of the lessons learned can be applied to our industry.
This paper outlines the necessary steps needed to establish a recycling infrastructure and the challenges we face as
an industry over the next ten years.

This paper will focus on Dr. Taguchi’s Robust Engineering methodology,measurement methods and experimental
results for the optimization of a lead free SMT process for use in an Automotive Electronics application. The key
strategy is to find process parameters that make the process insensitive to noise factors. Traditional optimization
approaches focus on maximizing the response variable while the Robust approach focuses on consistent results
regardless of variation in noise factors.
The Robust method was utilized in the development of a lead free process for manufacturing an Automotive SMT
product. Major factors that can create variation in a lead free process were identified,including lead free solder paste
brand,paste print speed,oven reflow temperatures and times,and reflow environment. Several noise factors were
studied including volume of solder paste,location of components on the board,and lead frame plating materials,
namely tin and palladium/nickel/gold. A series of measurements were made on the lead free product that assessed
the strength and reliability of lead free solder joints,measurements such as visual scoring,cross-section,surface
insulation resistance,and pull strength. Using the Robust experimental design,these measurements were optimized
to create high quality and reliable lead free SMT solder joints that were the most insensitive to the noise. In essence,
quality was increased by using variable measurements rather than by counting attributes (good/bad). Overall,a gain
of 2.1 dB was realized. In Robust terms,this equates to reducing variation in the lead free process by ~22%. This
study also revealed which of the processing factors were most significant in controlling the lead free process. The
results of this study and the use of Robust Engineering methodology provide a means for developing a full range of
lead free technology,components and products used on Automotive Electronics.

With the US military now committed to the phasing
out of lead-containing solders via the Joint Group on
Pollution Prevention (JG-PP) the electronics industry
has moved beyond debate about whether to make this
move and onto the question of how to implement the
change to lead-free solders as quickly as possible
without increasing cost or reducing reliability. The
Japanese industry began this change several years
ago and already has a vast amount of experience in
practical lead-free soldering and the resolution of the
technical issues that were inevitably encountered.
Although,because of the impact of legislative
pressure lead-free solders were initially used mainly
in consumer electronics the commitment of the
industry to environmental protection has meant that
these solders are now being introduced across a wide
spectrum of electronics. In this paper some of the
technical challenges encountered in the
implementation of lead-free solder will be discussed
and the solutions reported. The conclusion is that the
electronics industry can meet the challenges
presented by the phas ing out of lead-free solders in
much the same way as it deal with earlier challenges
such as the phasing out of CFC cleaning solvents and
the introduction of surface mount technology.

The goal of SMT production is a zero-defect process in which flawed materials never get to the customer; however,
in the ideal scenario,zero-defect production would mean that no flawed products ever come off the production line.
The typical SMT production line,which integrates inspection as a defect-containment method,operates with less
efficiency and effectiveness than is possible with modern technology,making the zero-defect proposition difficult to
achieve. The effort to increase product quality with inspection stations integrated into the product line can have two
results: no appreciable increase in quality metrics; and/or a loss of production line efficiency due to bottlenecks,
caused by choosing the wrong inspection system. In order to achieve increased quality,product yield,and line
efficiency,one must employ the right inspection system in the right way for process development and improvement,
not just defect containment.
What is the right system? Electronics packages are becoming increasingly smaller and more densely populated.
With this comes the need for high-intensity,nondestructive inspection that is both thorough and fast. X-ray
inspection is the only method of nondestructive testing that can provide high-level detection of the most-common
production defects: solder short,solder open,insufficient solder and reliability,and missing parts. Furthermore,only
offline X-ray inspection systems have the speed,imaging capabilities,and flexibility to create a zero-defect process.
What is “the right way?” In order to make quality a value-added part of the process at every level,the design of the
production line must reflect this goal. Inspection is not merely for post-production. A closed-loop production
process sets goals to achieve quality at all stages: setting process limits,measuring the process,controlling the
process,decreasing defect rate,and increasing first-pass yield.
This paper will analyze the typical SMT production process in terms of line setup,the role of inspection,the level of
quality achieved,and flaws in the process. We will also suggest an “ideal” SMT production line with regard to line
setup,the right inspection system to meet those goals,and the anticipated benefits towards achieving a zero-defect
result.

For test engineers and managers,automated optical
inspection (AOI) systems have emerged as a
countermeasure to the growing threats of lost
physical or electrical access to assembled PCB. AOI
systems are successfully employed in high volume
PCB applications to complement existing electrical
test methods with noted results of overall better
coverage,and higher yield at later test stages.
Inspection systems are commoditized,readily
available from many suppliers,and primarily
evaluate the presence of assembly defects (solder,
component,assembly),overcoming the need for
physical access that test mandates.

The economic environment in the electronics
industry has changed dramatically over the last two
years. The focus on the production floor has moved
from increasing capacity to improving the yield. One
of the major consequences of this shift in focus has
been increased interest in x-ray inspection.

The slowdown in the electronics industry has allowed the management of electronics products manufacturers to
dedicate time to reconsider their manufacturing strategy. For most of these companies,outsourcing has been in its
interim stages of giving it a try (stage 1) or outsourcing most of its PCB assemblies and/or selling off facilities (stage
2).
Original Equipment Manufacturers (OEMs) should be looking for ways to enter stage 3 of outsourcing - reconsider
the manufacturing strategy,outsource the final assembly (box build) along with PCB assembly and minimize
management costs.
While more and more companies are now looking to further reduce costs and to more quickly introduce new
products to the market,they are also concerned with losing core manufacturing knowledge as well as visibility to,
and control of,the outsourced job.