Sandia National Laboratories has programs covering
the range of MEMS technologies from LIGA to bulk
to surface micromachining. These MEMS
technologies are being considered for an equally
broad range of applications,including sensors,
actuators,optics,and microfluidics. As these
technologies have moved from the research to the
prototype product stage,packaging has been required
to develop new capabilities to integrated MEMS and
other technologies into functional microsystems. This
paper discusses several MEMS packaging efforts,
focusing mainly on inserting the SUMMiT™ V
(referred to hereafter as 5-level polysilicon) surface
micromachining technology into fieldable
Microsystems.
Sandia National Laboratories is engaged in a broad
range of MEMS and MEMS-based microsystems
development. This ranges from basic research on
materials,processes,and reliability,to development
of microsystems to meet the national security needs
of our customers. Packaging is crucial to fielding real
Microsystems throughout the industry. Packaging is
also critical to the basic research as well,since the
available environments in a package provide bounds
on materials,processes,and certainly reliability. This
paper will discuss several areas of packaging research
and development at Sandia.

One of the greatest obstacles in commercialization of MEMS is the cost of packaging and assembly. Packaging
needs for MicroSystems and MEMS technology vary by structure and application. Major improvements in MEMs
packaging technology are required to enable the growth of the MEMS market. This paper examines some of the
issues and challenges in packaging and assembly for a variety of devices.

A new type of Micro-Electro-Mechanical System (MEMS) structure has been developed on a printed wiring board
(PWB) platform. PWB,embedded passives (EP) and High Density Interconnect (HDI) technologies were utilized to
fabricate these structures in processes analogous to silicon MEMS. A microfluidic device has been successfully
demonstrated using these technologies. The system includes heaters,microchannels and valves,which could be
stand alone components or be combined with other plastic components. These components are amenable to further
integration for low cost microfluidic modules and systems for biological and chemical sensing applications.

The full hermetic package for electronics and
optoelectronic (OE) devices was first developed in
the 1800’s and has served these industries well. The
earliest optoelectronic devices,cathode ray tubes
(CRT) demonstrated in the late 1800’s,used a sealed
glass vacuum enclosure. The Braun Tube,for
example,was a scanning CRT display system that
used a glass envelope to seal out the atmosphere and
maintain the required vacuum. Later,electronic
vacuum tubes were developed,starting with the
Fleming diode that also used a glass envelope. A few
years later,De Forest introduced the triode (Audion)
that was able to amplify,making it the first active
electronic device. Many of the early OE and
electronic devices required a vacuum to operate
because the flow of electrons through free space was
part of the mechanism. Today,only a small minority
of products requires a vacuum. Yet,the century-old
tradition of the full-hermetic sealed enclosure has
continued for many products. Figure 1 shows an early
hermetic package used for one of the first electronic
devices.

With the Waste Electrical and Electronic Equipment
(WEEE) Directive in Europe outlawing lead from
many electronic devices produced and imported in
the EU by July 2006,as well as with foreign
competition driving the implementation of lead-free
electronics assembly around the world,it appears that
the drive towards lead-free electronic assembly may
be inevitable. However,even with years of lead-free
research already behind us,additional questions
regarding how manufacturers can successfully
transition to lead-free assembly continue to arise.
To successfully achieve lead-free electronics
assembly,each participant in the manufacturing
process,from purchasing to engineering to
maintenance to quality,must have a solid
understanding of the changes required of them. This
pertains to considerations regarding design,
components,PWBs,solder alloys,fluxes,printing,
reflow,wave soldering,rework,cleaning,equipment
wear & tear and inspection. Engineering personnel in
particular will have to pay close attention to design,
components,PWBs,solder alloys,fluxes,and the
printing,reflow,wave soldering,rework,cleaning,
equipment and inspection processes.

The Massachusetts Toxics Use Reduction Institute (TURI) has sponsored a consortium of Massachusetts based
corporations to investigate lead-free (Pb-free) surface mount soldering technology. The current effort is a Design of
Experiments (DOE) analysis using three NEMI recommended tin silver copper (SnAgCu) alloys from three different
solder manufacturers,five Pb-free PWB surface finishes,and two reflow environments. The consortium designed a
special test PWB and that was used in the experiments. A modified visual test procedure was developed and the
results are presented based on statistical analysis. Test PWBs with BGAs,leaded and chip components will be
subjected to thermal cycling,and then tested for mechanical degradation. Standard tin-lead (SnPb) eutectic solder
63/37 reflow samples were used as a control.
Components on these test substrates include plastic and ceramic leaded SOICs,FPQFPs,an LCC,45mm square ball
grid arrays (BGAs) and small passive devices. This paper will discuss results along with the issues associated with
each lead and PWB finish. Conclusions from this paper can be used as a guide to future product offerings,and to
proper testing,reporting methods and recommendations to satisfy future Pb-free requirements.

Intermetallic formation and growth were studied for the alloys Sn-3.2Ag-0.8Cu,Sn-3.5Ag,Sn-0.7Cu,and Sn-9Zn.
Coupons of solder joints (prepared by melting some of each solder alloy on a copper-plated circuit board) were
subjected to thermal aging tests for 20,100,200,and 500 hours at 70,100,and 150oC. Also,the activation energies
for the formation of each intermetallic compound and the total intermetallic layer for the four copper-solder systems
were determined. The results confirm that the formation of intermetallic layers is controlled by diffusion and that the
intermetallic layers grow by thermal activation in a parabolic manner. The total thickness of the intermetallic
compounds produced at 150oC for 500 hours and the activation energies for the total intermetallic layer in the four
copper-solder systems were: 14 µm and 0.74 eV/atom for Cu/Sn-3.2Ag-0.8Cu,13 µm and 0.85 eV/atom for Cu/Sn-
3.5Ag,14 µm and 0.68 eV/atom for Cu/Sn-0.7Cu,and 19 µm and 0.35 eV/atom for Cu/Sn-9Zn.

The introduction of Pb-free solder into the electronics industry has required changes to the standard surface mount process.
The largest changes are in the reflow process,as Pb-free pastes require higher temperatures and tighter process controls than
standard SnPb solders. The goal of this work was to develop a reliable Pb-free process utilizing SnAgCu solder paste as a
replacement for SnPb solder paste. In general,SnAgCu solder pastes recommend a peak temperature of between 242°C to
262°C as compared to the 208°C to 235°C commonly utilized for SnPb solder. Due to the higher reflow peak temperature;
the use of some components may not be feasible for Pb-free assembly. A large number of commonly used components are
sensitive to the standard higher peak temperatures of 235-240°C. One of the major goals of the work was to see if new
profiling technologies could be used to reduce changeover time from existing SnPb solder profiles to Pb-free profiles. This
was done over a variety of test boards ranging from a cell phone emulator to a board with a flexible interposer mounted on an
aluminum backing. The second major goal of the study was to determine the lowest possible peak temperature required for a
reliable Pb-free process. During the course of the work,yield results were recorded for various peak temperatures and SEM
analysis was done to look at the intermetallic growth and grain structure of the solder joints processed at the various peak
temperatures.

Within the Surface Mount Assembly (S.M.A.) process,solder paste is primarily used as a mechanical and electrical
connection. Solder paste is generally deposited using a mass imaging process,such as squeegees,however this paper
will utilize the enclosed print head technology. The process associated with mass imaging is a critical and
demanding stage in the soldering phase of S.M.A. It has been documented many times that this process contributes
more than 60% of all S.M.A faults; This being the case it illustrates the requirement to have a full comprehension of
the mass imaging process.
With legal and commercial pressure put on to remove lead from within the electronics sector,the solder paste alloy
is obviously under review. Much work is being carried out on the metallurgical properties of these lead free solder
pastes such as joint strength and compatibility within the manufacturing process. However,this paper will focus on
investigating the process window for mass imaging of lead-free materials. The major influences within the mass
imaging process have been documented in numerous studies using lead rich materials. However,the material used to
replace the Pb component changes the solder paste properties and therefore the characteristics of the print medium.
Therefore to conduct this study a two level three factor Design of Experiments with center points will be utilized.
The factors investigated in this paper will be print speed,paste pressure and separation speed. Three material
suppliers will be used to ensure the results give a broad representation of the significant effects on the process
window. Comparison to a lead rich material will also be carried out to allow an evaluation to be concluded. Each
paste will be tested for paste release transfer efficiency using the optimum setting concluded from the
characterization stage.

The popular tin (Sn) rich lead free solders are causing severe corrosion to many of the materials used in today’s
Wave Solder systems. Users are experiencing higher maintenance frequency and reduced life of wave solder
machine components. This paper describes the effects of Sn rich solders in contact with various materials and
discusses alternate methods to alleviate this problem.
In cooperation with the Metallurgy Department of the University of Missouri - Rolla,the Sn corrosion effects were
studied for stainless steels,coated stainless steels,titanium,cast iron,and other materials. Corrosion effects and test
results are presented for each of these materials. Optical and scanning electron microscopy and x-ray emission
chemical analysis were the primary tools used in the evaluation of failed samples. Based upon this research and field
trials,recommendations are given which address the expected field life,economic impacts,and materials selections
for new or used Wave Solder equipment.