C4NP Lead Free vs. Electroplated High Lead Solder Bumps
There are various C4 (Controlled Collapse Chip Connection) solder bumping technologies used in volume production. These
include electroplating,solder paste printing,evaporation and the direct attach of preformed solder spheres. FlipChip in
Package (FCiP) demands many small bumps on tight pitch whereas Wafer Level Chip Scale Package (WLCSP) typically
requires much larger solder bumps. All these technologies have limitations for fine pitch bumping. The most commonly used
method of generating fine-pitch solder bumps is by electroplating the solder. This process can be costly,especially when it
comes to lead-free solder alloys. These challenges in the transition to lead-free solder bumping has led the European Union to
grant exemptions from the ban of lead in certain solder bumping applications. However,the second level assembly cost of
Lead-Free and Leaded line in parallel is driving for a commonality to move to lead-free for the entire industry.
The terminal metals process forms C4 (Controlled Collapse Chip Connection) solder bumps and the associated bump limiting
metallurgy pads on the surface of silicon integrated circuit wafers. The Bump Limiting Metallurgy (BLM) or Under Bump
Mettalurgy (UBM) pads are located between each solder bump and the surface of the wafer. Typically,the wafers contain a
replicating pattern of chips / die. The UBM and C4 solder bumps provide an electrical and mechanical connection for the
chip to its first level package
C4NP (C4-New Process) is a novel solder bumping technology developed by IBM and commercialized by Suss MicroTec.
C4NP addresses the limitations of existing bumping technologies by enabling low-cost,fine pitch bumping using a variety of
solder alloys. C4NP is a solder transfer technology where molten solder is injected into pre-fabricated and reusable glass
templates (molds). Mold and wafer are brought into close proximity and solder bumps are transferred onto the entire 300mm
(or smaller) wafer in a single process step. C4NP technology is capable of fine pitch bumping while offering the same alloy
selection flexibility as solder paste printing. The simplicity of the C4NP process makes it a low cost solution for both,finepitch
FC in package as well as large pitch / large ball WLCSP bumping applications.
This paper provides a summary of manufacturing and reliability results of C4NP Lead-Free bumps and compares it with the
Electroplated High Lead solder bumped high-end logic devices. We also discuss the relevant process equipment technology
and the requirements to run a HVM (high volume manufacturing) C4NP process. We will also describe the C4NP
manufacturing cost model and elaborates on the cost comparison to alternative bumping techniques. The data in this paper is
provided by IBM’s packaging operation at the Hudson Valley Research Park in East Fishkill,NY