The electronics market demands for smaller,faster,more reliable and less costly products continues to fuel major
changes in printed wiring board designs. Higher layer counts,increasing circuit densities and HDI technologies have
forced the PWB manufacturing industry to find new and unique methods of producing the sub 3mil lines and spaces
required to meet today’s design challenges. Until recently,Laser Direct Imaging (LDI) had been a viable,but cost
prohibitive method of creating ultra-fine line circuitry patterns. Today,new advancements in LDI equipment,laser
technology as well as the introduction of specialized photoresists have allowed LDI to emerge as a production viable
process. Continuing to derail the cost drivers associated with laser direct imaging will further enable LDI processing
to play a leading role in PWB manufacturing today and into the future.

Wireless Communications and Broadband technologies are driving the need for advanced laminate materials with
improved dielectric properties. This paper focuses on new laminate materials with potential uses in multilayer
printed circuit boards (PCBs) for high-speed digital/RF/microwave applications.
The objective of this paper is to discuss the resin structure to property relationship of these new materials. The
primary focus will be on the interaction of various factors,such as,glass,chemical composition and laminate
construction on the dielectric constant and the dielectric loss properties of laminate composites at frequencies in the
2-10 GHz range. This work is focused on epoxy based and non-epoxy based thermoset polymeric resins.

Successful copper plating of blind micro-vias is very strongly dependant on the effective mass transport of copper
ions into the vias. This mass transport limitation is demonstrated by a rough or even in extreme cases at high aspect
ratio or high applied current densities,a burnt appearance of the copper deposit at the base of the via. The poor
quality of deposited copper has an obvious impact on productivity and also on the feasibility of filling the blind
micro -vias required for highest packaging density.
This paper describes the methods used to evaluate solution flow in micro-vias carried out in controlled laboratory
conditions. The subsequent successful implementation of improved solution flow in simulated production equipment
and also in full-scale production is shown. Results are included from horizontal and also vertical processing; in both
cases using production equipment operating with reverse pulse plating and insoluble dimensionally stable anodes.

Laser drilling has clearly captured the technology lead in the formation of HDI microvias with a 78% ownership,1
currently dominating over photo defined,plasma etched and mechanically drilled methods. Processing speeds are
now cutting the costs for laser drilled blind microvias to a level where more and more OEM’s are considering
microvias as an alternative to further fine line technology with its inherent yield issues. This paper will review the
critical elements of microvia processing technology in an overview and focus on the elements that improve yield in
laser drilling. Further,some simple suggestions will be offered to help control and improve yields of laser drilled
blind microvias.

In the Printed Wiring Board (PWB) industry,the growing demand for a higher number of circuit components to be
contained in smaller circuit areas requires that some of the passive components (resistors,capacitors,etc) are now
embedded within the board. This allows for tighter component placement with lower via counts and has also
increased the reliability of these devices.
For thick film resistors,the resistor paste for embedded resistors is screen-printed on the surface of the PWB
laminate (either copper or dielectric) that is patterned according to the circuit design. Current technologies require
wet paste that is oven cured after placement. This paste process results in a resistor with a tolerance of 20-50% from
the target value. Thin film resistors deposited on the PWB also show variation in their values. Resistor trimming is
required to bring this tolerance down to about 1-5% as required by the PWB design. This paper discusses the
implementation of passive resistor trimming for large board manufacturing.

Highs Density Interconnects (HDI) printed circuits are now being designed in ever increasing quantities. HDI brings
some interesting new solutions to age-old signal integrity (SI) concerns,and concerns that will grow as rise-times
continue to drop.
This article focuses on five major areas of SI concerns:
1. Noise
a. Noise-reflections
b. Noise-crosstalk
c. Noise-simultaneous switching
2. Electro-Magnetic Interference (EMI)
3. Interconnect Delays
In each case,HDI offers improvements and alternatives - but it is not a panacea. A couple of 'cautions' are listed that
can be a major stumbling block to HDI implementation,fortunately,they are not SI based. Important to SI is the
materials used in HDI. Although not the focus of this article,the materials selected as well as the dimensional stackup
and PCB design rules will influence SI and electrical performance (impedance,crosstalk and signal
conditioning). Miniaturization provided by HDI will be a major contributor to SI performance. Finally,fine-pitch
BGAs are addressed in term of design rules and layer stackups,all using the improved SI performance
recommendations included in this article

Because high performance products are limited in speed by packaging and interconnections,signal integrity analysis
and PWB simulation become nowadays very pressing and key issues. Taking into account these aspects,the
discontinuities of signal traces have also a more and more important contribution. For instance,in the past the
biggest problems regarding vias/via pads were only solderability and manufacturability. Today a via is understood
also as an electrical discontinuity and has to be properly designed and used.
The paper intends to present investigations realized in the labs of Center of Technological Electronics and
Interconnection Techniques (CETTI) from Bucharest,Romania,and focused on the influence of discontinuities and
parts of metallic interconnection networks on high-speed/high-frequency signals propagation. A computer modeling
was made and Spice models for a good compatibility with circuit simulators were obtained. S-,Y-,Z- parameters of
different kind of structures were calculated,too. The evaluation was realized by a modern MOM (Method of
Moments) electromagnetic simulation technique.1 At the end,a library of models for different discontinuities was
generated.

A concern in the manufacture of laminate PWB’s is the transfer of interior circuit patterns to the surface of the
board. This can lead to difficulties in forming the external circuitry. Typically,a number of identical boards are
assembled,separated by metal sheets (separator plates) and pressed. As layer counts have increased and the metal
separators have migrated towards thin aluminum,image transfer has become a bigger concern.
A study is conducted using Finite Element Analysis to examine the deformation and stress field within the laminate
and along the separator plates to better understand the mechanisms of image transfer. The analysis focuses on the
thermal growth of the composite during a fabrication cycle using a 2-d slice model of a “book” having orthotropic
linear elastic material property sets. A comparison is provided that illustrates order of magnitude agreement between
predicted FEA deformations and observations,and measurements made in a sample board.

This paper discusses two typical PTH failures – barrel cracking and post separation – induced by accelerated testing
or observed during manufacturing. Finite element models have been developed to help understand the effect of the
hole design parameters on the stress/strain state after thermal excursions.
An identical approach is then applied to study buried core vias – buried vias that connect from layer 2 to layer n-1 in
a Type II,high density interconnect (HDI) board. The impact of via fill material and its mechanical properties are
also presented. Additionally,the use of finite element analysis to perform life is discussed.

Motorola has developed a suite of technologies for embedding resistors,inductors,and capacitors in HDI printed
wiring boards. This paper describes the technology and presents a case study demonstrating the performance tradeoffs and design considerations that must be taken into account when embedding passive components into HDI PWB substrates. Furthermore,the benefit of embedded passives technology in adding “value” to the PWB,and in driving down size,cost,and part count for the OEM is illustrated.