Thermally conductive adhesives are widely implemented in a variety of electronic assemblies. These adhesives combine the function of mechanical fasteners and thermal interface materials into one product. This combination of roles allows for the preparation of assemblies that are smaller, lighter, and easier to manufacture than traditional combinations of pads and greases or gels with mechanical fasteners. The use of thermally conductive adhesives requires an increased understanding of their mechanical properties, especially their fracture behavior so that the reliability of an assembly can be accurately determined. Since most thermally conductive adhesives are composed of a filler in conjunction with a polymeric resin this study examined the effects of the filler particle size distribution and morphology on the fracture behavior and mechanical properties of a silicone adhesive. It was seen that a greater proportion of small filler and an increased filler surface area for spherical fillers improved the fracture toughness of the adhesive.

The trend of incorporating more and more electronic devices into our daily life is bringing challenges for the industry. The need for smaller and more powerful devices is also facing one problem: heat dissipation. Processor chips, large capacitors, inverters, transformers and some ICs are usually the components in an electronic assembly generatingheat. Heat can reduce performance and usable life of the electronics and thus require thermal management to improve reliability and prevent premature failure.  More than 50% of power module failures are temperature related due to inadequate or improper thermal management.

Thermal Interface Materials (TIMs) play a key role in the thermal management of electronic systems by providing a path of low thermal resistance between the heat generating devices and the heat spreader/sink. Typical TIM solutions include adhesives, greases, gels, phase change materials, pads, and solder alloys. Among these different solutions, greases typically offer better thermal performance, reduce manufacturing cycle times and frequently are considered the lowest cost solution. In the area of thermal management, silicone thermally conductive greases are extensively used due to their proven thermal and environmental stability coupled with excellent wet-out performance. This paper presents reliability data to explore the thermal performance of a silicone thermally conductive grease formulation when exposed to different conditions such as: high temperature ageing, thermal cycling, damp heat, and power cycling. 

There is an increase in the number of optical sensors and cameras being integrated into electronics devices. These go beyond cell phone cameras into automotive sensors, wearables, and other smart devices. The applications can be lens bonding, waveguide imprinting, or other applications where the adhesive is in the optical pathway. To support these various optical applications, new materials with tailorable optical properties are required. There is often a mismatched refractive index between plastic lenses such as PC (Poly Carbonate), COP (Cyclo Olefin Polymer), COC (Cyclo Olefin Copolymer), PMMA (Poly Methyl Methacrylate), and UV curable liquid adhesive. A UV curable liquid adhesive is needed where you can alter the refractive index from 1.470 to 1.730, and maintain high optical performance as yellowness index, haze, and transmittance. This wide range of refractive index possibilities provides optimized optical design. Using particular plastic lens must consider how chemical attack is occurring during the process. Another consideration is that before the UV curable liquid adhesive is cured, chemical raw component can attack the plastic lens which then cracks and delaminates. We will also show engineering and reliability data which defined root cause and provided how optical performance is maintained under different reliability conditions.

The need to minimise thermal damage to components and laminates, to reduce warpage-induced defects to BGA packages, and to save energy, is driving the electronics industry towards lower process temperatures. For soldering processes the only way that temperatures can be substantially reduced is by using solders with lower melting points. Because of constraints of toxicity, cost and performance, the number of alloys that can be used for electronics assembly is limited and the best prospects appear to be those based around the eutectic in the Bi-Sn system, which has a melting point of about 139°C.

Experience so far indicates that such Bi-Sn alloys do not have the mechanical properties and microstructural stability necessary to deliver the reliability required for the mounting of BGA packages. Options for improving mechanical properties with alloying additions that do not also push the process temperature back over 200°C are limited. An alternative approach that maintains a low process temperature is to form a hybrid joint with a conventional solder ball reflowed with a Bi-Sn alloy paste. During reflow there is mixing of the ball and paste alloys but it has been found that to achieve the best reliability a proportion of the ball alloy has to be retained in the joint, particular in the part of the joint that is subjected to maximum shear stress in service, which is usually the area near the component side.

The challenge is then to find a reproducible method for controlling the fraction of the joint thickness that remains as the original solder ball alloy. Empirical evidence indicates that for a particular combination of ball and paste alloys and reflow temperature the extent to which the ball alloy is consumed by mixing with the paste alloy is dependent on the volume of paste deposited on the pad. If this promising method of achieving lower process temperatures is to be implemented in mass production without compromising reliability it would be necessary to have a method of ensuring the optimum proportion of ball alloy left in the joint after reflow can be consistently maintained.

In this paper the author explains how the volume of low melting point alloy paste that delivers the optimum proportion of retained ball alloy for a particular reflow temperature can be determined by reference to the phase diagrams of the ball and paste alloys. The example presented is based on the equilibrium phase diagram of the binary Bi-Sn system but the method could be applied to any combination of ball and paste alloys for which at least a partial phase diagram is available or could be easily determined.

The electronics industry could benefit greatly from using a reliable, manufacturable, reduced temperature, SMT solder material (alloy-composition) which is cost competitive with traditional Sn3Ag0.5Cu (SAC305)solder. The many possible advantages and some disadvantages / challenges are discussed. Until recently, the use of Sn/Bi based materials has been investigated with negative consequences for high strain rate (drop-shock) applications and thus, these alloys have been avoided. Recent advances in alloy “doping” have opened the door to revisit Sn/Bi alloys as a possible alternative to SAC-305 for many applications.  We tested the manufacturability and reliability of three low-temperature and one SAC-305 (used as a control) solder paste materials. Two of these materials are doped Sn/Bi/Ag and one is just Sn/Bi/Ag1%.We will discuss the tests and related results. And lastly, we will discuss the prospects, applications and possible implications (based on this evaluation) of these materials together with future actions.

Keywords: Bismuth, Tin, LTS, SMT, Paste, Low Temp Solder.

With the adoption of Wafer Level Packages (WLP) in the latest generation mobile handsets, the Printed Circuit Board (PCB) industry has also seen the initial steps of High Density Interconnect (HDI)products migrating away from the current subtractive processes towards a more technically adept technique, based on an advanced modified Semi Additive Process (amSAP).

This pattern plate process enables line and space features in the region of 20um to be produced, in combination with fully filled, laser formed microvias. However, in order to achieve these process demands, a step change in the performance of the chemical processes used for metallization of the microvia is essential.

In the electroless Copper process, the critical activator step often risks cross contamination by the preceding chemistries. Such events can lead to uncontrolled buildup of Palladium rich residues on the panel surface, which can subsequently inhibit etching and lead to short circuits between the final traces.

In addition, with more demands being placed on the microvia, the need for a high uniformity Copper layer has become paramount, unfortunately, as microvia shape is often far from ideal, the deposition or “throw” characteristics of the Copper bath itself are also of critical importance.

This “high throwing power” is influential elsewhere in the amSAP technique, as it leads to a thinner surface Copper layer, which aids the etching process and enables the ultra-fine features being demanded by today’s high end PCB applications.

This paper discusses the performance of an electroless Copper plating process that has been developed to satisfy the needs of challenging amSAP applications. Through the use of a radical predip chemistry, the formation, build up and deposition of uncontrolled Pd residues arising from activator contamination has been virtually eradicated. With the adoption of a high throwing power Copper bath, sub 30um features are enabled and microvia coverage is shown to be greatly improved, even in complex via shapes which would otherwise suffer from uneven coverage and risk premature failure in service.

Through a mixture of development and production data, this paper aims to highlight the benefits and robust performance of the new electroless Copper process for amSAP applications.

The demand for miniaturization and higher density electronic products has continued steadily for years and this trend is expected to continue,  according to various semiconductor technology and applications roadmaps. The printed circuit board (PCB) must support this trend as the central interconnection of the system. There are several options for fine line circuitry. A typical fine line circuit PCB product using copper foil technology, such as the modified Semi-Additive Process (mSAP), uses a thin base copper layer made by pre-etching.  The ultrathin copper foil process (SAP with ultrathin copper foil) is facing a technology limit for the miniaturization due to copper roughness and thickness control. The SAP process using sputtered copper is a solution, but the sputtering process is expensive and has issues with via plating. SAP using electroless copper deposition is another solution, but the process involved is challenged to achieve adequate adhesion and insulation between fine pitch circuitries.

A novel catalyst system, liquid metal ink (LMI),has been developed that avoids these concerns and promotes a very controlled copper thickness over the substrate, targeting next generation high density interconnect (HDI)to wafer level packaging substrates and enabling 5micron level feature sizes. This novel catalyst has a unique feature, high density and atomic-level deposition. Whereas conventional tin-palladium catalyst systems provide sporadic coverage over the substrate surface, the deposited catalyst covers the entire substrate surface. As a result, the catalyst enables improved uniformity of the copper deposition starting from the initial stage, while providing higher adhesion and higher insulation resistance compared to the traditional catalysts used in SAP process.

This paper discusses this new catalyst process which both proposes a typical SAP process using the new catalyst and demonstrates the reliability improvements through a comparison between a new SAP PCB process and the conventional SAP PCB process.