Fralock Earns IPC-1791 Qualified Manufacturers Listing (QML) as Trusted Electronics Designer

IPC’s Validation Services program has awarded an IPC-1791, Trusted Electronics Designer Requirements Qualified Manufacturer Listing (QML) to Fralock, located in Valencia, Calif.                      

Following the initial IPC audit, Fralock passed stringent design requirements to optimize product quality, reliability, and consistency across the entire manufacturing operation, earning a place on IPC’s global network of rigorously vetted and trusted sources. 

“Fralock provides product design, development, engineering, prototyping, and manufacturing services to customers that require a high level of quality and precision,” said Shibu Gangadharan, vice president of specialty engineered materials at Fralock. “This validation assures our customers that processes pertaining to IPC-1791 are adhered to throughout the manufacturing cycle.”         

IPC's Validation Services QML program was developed to promote supply chain verification. It also provides auditing and qualification of electronics companies' products and identifies processes which conform to IPC standards.                                   

"Different from other audit programs, IPC's Validation Services programs uniquely provide technical and in-depth assessments of products and processes in accordance with IPC standards," said Randy Cherry, IPC director of Validation Services. "We are pleased to recognize Fralock on becoming members of IPC's network of trusted QML suppliers.”                                                                                 

For more information about IPC's Validation Services QPL/QML program, visit www.ipcvalidation.org or contact Randy Cherry at RandyCherry@ipc.org or +1 847-597-2806.

Analyzing a Printed Circuit Board with Oxide Residue

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A number of similar Printed Wiring Assemblies (PWAs) had been subjected to final electrical tests on automated test equipment when a common test failure was recognized. All PWAs were failing for high leakage resistance; the occurrences were not on the same electrical nets, but all PWAs had similarities in that the failed signals in question had traces on layers 2 and n-1. Extensive analysis ensued and determined there was significant oxide treatment residue on layers 2 and n-1 of a sub compositefor this board design. This is a sequentially laminated Printed Circuit Board (PCB) where layers 2 thru n-1 are laminated initially, followed by a second and final lamination of layers 1 and n.

The first objective of this paper is to describe theoxide residue case history discovered with numerous PWAs. The second objective is to provide a summary of methods and techniques engaged in when 1) determining the oxide residue condition and 2) determining whether the functional performance of the printed wiring assemblies (PWAs) would be impacted by the condition.

Initially, conformance coupons from the affected lot of PCBs were reviewed. It was discovered that bright field inspection techniques did not effectively detect any anomalies, so dark field techniques were employed during the failure analysis investigation. During this review, small white areas were seen at the interface of layers 1 and 2, as well as n-1 and n. In an effort to better observe the anomaly, horizontal grinds were conducted down to the dielectric layer interface where the crystalline structure residue was prolific. During this investigation, other PCB lots (already built into PWAs that passed electrical tests) were found to have been affected, but to a less severe degree. A variety of techniques were utilized to evaluate the issue and determine the viability of using oxide-residue contaminated PWAs. These techniques included, but were not limited to: visual examinations, PCB cross-section analysis, horizontal grinds, scanning electron microscope (SEM) evaluation with Energy Dispersive Spectroscopy (EDS), electrical simulations, and Conductive Anodic Filament (CAF) testing.

This paper provides a structured, methodical approach to failure analysis for this type of failure, as well as to determining the impact to functional performance. It may be utilized as a guideline for others facing a similar predicament.

Author(s)
Wade Goldman , Andrew Dineen, Hailey Jordan, Curtis Leonard, Edward Arthur
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Outgassing Behaviour of SMT Flux Residue During Reflow Soldering

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SMT-flux residues are feared to be a potential risk factor for quality issues in electronic assembly and interconnect technology. This work shows how the amount of no clean flux residues can be reduced by adapting the reflow conditions and shows that even highly viscous flux residues are still humidity robust. Especially, no clean solder pastes are believed to cause numerous quality issues such as reduced humidity robustness, particles sticking in viscous flux residues, reduced adhesion of coatings and other issues during the following assembly and interconnect (AIT) processes. Those issues can be tracked down to both the physical and chemical properties of the flux residues namely the chemical composition, the viscosity, the mass, the covering and the distribution on the PCB and the components. To assess the risks and to control the flux residue properties a deep understanding of the mechanisms during and after reflow soldering is crucial. This understanding can only be reached with suitable measurement methods to analyze the different physical and chemical properties of the flux residues. This work presents a gravimetrical approach to measure the amount of flux residues remaining on the PCBA after reflow soldering. The results show that the outgassing and reaction behavior of the flux residues are caused by 3 main impact factors: the thermal load (reflow temperature and time), the local partial pressures of the outgassing organic gases (solder joint design, e.g., covered/open solder joints) and the global partial pressures (reflow atmosphere, e.g., gas circulation speed, oxygen partial pressure). No clean solder fluxes consist mainly of resin (encapsulates ionic contaminations), solvents (make paste well printable) and activating acids (remove metal oxide layers). Viscous flux residues where the resin matrix is not hard are often believed to be a source for ionic contaminations which could lead to electrochemical migration. Here, SIR (surface insulation resistance) measurements of PCBAs with highly viscous no clean flux residues prove a high humidity robustness of no clean solder pastes. The knowledge about the main impact factors on the physical and chemical properties of flux residues allow to optimize the no clean SMT reflow soldering and could be a solution for the issues, which are encountered with highly reactive clean solder pastes e.g., electrochemical migration.

Author(s)
Theresia Richter, Shiyu Huang, Thomas Blank, Pierre Eckold, Lothar Henneken
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

How to Manage Material Outgassing in Reflow Oven

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In a lead-free reflow process, temperatures are higher, and materials use outgasses more than in a leaded reflow process. The trends toward higher density populated boards and more pin-in-paste technology also increase solder paste use. More components and more solder paste result in more outgassing of chemistry during the reflow process. Some assemblies report condensation of vapors when the cold printed circuit board enters the oven. Little is known about the interaction between these condensed materials in terms of the interaction between these condensed materials and the reliability of the assembly. Apart from the question of reliability, a printed circuit board contaminated with a small film of residues after reflow soldering is not desirable.

This study investigates the evaporation of chemicals during the reflow process from preheating until cooling. Different solder pastes are compared with respect to outgassing. Residues collected in the reflow process were submitted to Thermal Desorption-Gas Chromatography-Mass Spectrometry (TDGMS) to determine which volatile and semi-volatile substances the residues contained. A test vehicle was made to investigate if these gasses could be eliminated using a catalyst. After a successful investigation, these catalysts were installed in reflow ovens on individual zones and in those areas where the most outgassing was determined. Different catalysts and solder pastes, chain lubricants, and other materials were part of the study.

Author(s)
Gerjan Diepstraten
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Comparing Soldering Results of ENIG and EPIG Post Steam Exposure

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ENIG, electroless nickel immersion gold is now a well-regarded finish used to enhance and preserve the solder-ability of copper circuits. EPIG, electroless palladium immersion gold, is a new surface finish also for enhancing and preserving solder-ability but with the advantage of eliminating Electroless Nickel from the deposit layer. This feature has become increasingly important with the increasing use of high frequency PWB designs whereby nickel’s magnetic properties are detrimental. We examine these two finishes and their respective soldering characteristics as plated and after steam aging and offer an explanation for the performance deviation.

Comparing the results of steam age test data shows a clear benefit of EPIG over ENIG. After even a short duration exposure to steam, ENIG finishes failed to solder. Much longer steam exposures produced little to no effect on EPIG plated samples. Rapid oxidation of the electroless nickel phosphorous layer when stressed with heat and moisture explains the superior EPIG result.

The ability to demonstrate excellent solder-ability following steam exposure represents increased fabrication reliability under non-ideal storage conditions.

Author(s)
J. Bengston and R. DePoto
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Designing a High Performance Electroless Nickel and Immersion Gold to Maximize Highest Reliability

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The latest highest reliability requirements demand a high performance electroless nickel and immersion gold (HP ENIG). The new IPC specification 4552A has refocused the industry with reference to nickel corrosion. The interpretation of the existing specification, that judges corrosion on 3 levels, is complex and if misinterpreted can lead to phantom failures. An obvious way to avoid any potential misinterpretation is to eradicate any evidence of corrosion completely. Solderability and environmental corrosion resistance are also highly significant prerequisites when discussing Highest Reliability. These will be evaluated by High Speed Shear testing(HSS)and gas chamber testing respectively.  In addition to the more demanding requirements of the HP ENIG to satisfy High Reliability requirements, the system needs to exhibit good basic layer characteristics. It is also the intention of this paper to evaluate whether there is any ‘value added’ or unintended benefits to a HP ENIG. An example of this would be superior gold distribution and associated gold saving potential. Data generated by Design of Experiment (DOE) will be used to evaluate the impact of electroless nickel variables in combination with traditional and cyanide free immersion gold on recognized quality expectations. The results are expected to be practical and production applicable solution underpinned by solid data and it is hoped that they may dispel myths or misunderstandings within the printed circuit board (PCB)manufacturing environment.

Key words: Highest reliability, Nickel corrosion, Corrosion resistance, Solderability, Black pad

Author(s)
Robert Spreemann, Rick Nichols, Sandra Nelle
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

Multilayered Flexible Hybrid Screen Printed Circuits on Disposable Medical Grade Substrates

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This paper details the realization of a multi-layered, printed, conformable hybrid circuit. The circuit was created using silver(Ag) flake ink as a conductive layer and UV acrylic-based ink as a dielectric layer. Both layers were printed on medical grade thermoplastic polyurethane(TPU) substrates. Traditional surface mount electronic components were attached onto the printed pads to create the multilayered hybrid circuit. Functionality of the hybrid circuit was demonstrated by integrating an embedded microcontroller, a near-field communication(NFC) chip, and a temperature sensing chip. A printed NFC antenna transmitted the measured data from the sensor circuit to a custom mobile device application. The details of the circuit design, fabrication and temperature sensor data are presented in this paper.

Key words: Additive Manufacturing, Component Attachment, Flexible Electronics, Flexible PCB, Flexible Hybrid Electronics, Printed Electronics, Printed NFC antenna, Screen Printing.

Author(s)
N. Richards, S. Stevens, N. Ghalib, M. Sussman, H. Ramirez, R. Hugeneck, G. Wable, J. Richstein, S.G.R. Avuthu
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019

PCB Designers to Vie for Design Champion Title at IPC APEX EXPO 2023

Virtual preliminary heats to start this October

For the second consecutive year, IPC is hosting an IPC Design Competition, inviting printed circuit board designers to compete to become the IPC Design Champion of 2023. The IPC Design Competition is composed of two heats – a virtual preliminary heat and an in-person layout final for the three top competitors on January 24, 2023 at IPC APEX EXPO in San Diego, Calif.

“This year, we're kicking things up a notch with more advanced designs, travel stipends for finalists, and cash prizes,” said Patrick Crawford, manager, design standards and related industry programs. “Anyone with an interest in board design can register, but we’re recommending the hobbyists and professionals alike have several years of experience designing boards and a familiarity with and ability to implement IPC standards requirements. Access to an ECAD tool is a must for the first heat,” added Crawford.

The preliminary heat will be held October 17 to November 18, 2022, allowing designers to use their preferred tools to complete a full board buildup within 25 days. Provided with only a schematic, a BOM (bill of materials) and a scope of work document, competitors will be responsible for returning a Gerber file package of a completed design and judged against their interpretation and implementation of design per IPC standards and general DFX (design for excellence) principles. Three finalists will be invited to participate in the four-hour layout final at IPC APEX EXPO 2023. In the final round, competitors will be given a partially complete Altium Design project file and will have four hours to complete a layout including design rule specification, routing, and component placement.

Registration for the IPC Design Competition is free and closes October 13, 2022. For more information, including eligibility requirements, information on preliminary and final heats and registration form, visit www.ipc.org/standards-ipc-design/ipc-design-competition-2023.

Printed Electronics for Medical Devices

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As is the case with many other markets where faster, highly capable technologies have resulted in more intelligent processes and products, the medical device sector is also undergoing a “smart” transformation. This has driven the development of medical devices that provide greater access to in-home care and monitoring and faster results for medical professionals, with the overarching benefit of better patient outcomes. Devices applied to the human body that continuously sense and report vital signs in real-time, moisture sensing systems that aid in patient health and comfort optimization, and skin-applied patches with timed drug measurement and release are all smart healthcare realities today. Sensor technologies that bridge the gap between standard, rigid assemblies and more flexible user interfaces are pushing the envelope toward smaller and more convenient form factors, making smart healthcare devices a mainstream reality. This paper will share details about multiple medical sensing applications and the advanced materials and processes used to assemble them for optimal functionality.

Author(s)
Jeff Grover
Resource Type
Technical Paper
Event
IPC APEX EXPO 2019