Minimizing Signal Degradation in Flexible PCB Microstrip and Stripline Transmission Lines That Use Cross-Hatched Return Planes

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In restricted-space applications,flexible PCBs must be able to fold with especially small bend radii. This in turn requires the return planes associated with microstrip and stripline transmission lines be cross-hatched. But the process of cross-hatching the return planes can significantly degrade the performance of these transmission lines. This paper shows examples of how the cross-hatching the ground plane introduces signal distortion and how changing the size,shape and orientation of the cross-hatch pattern can reduce some of the distortion.

Author(s)
Franz Gisin
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Semi-Additive Process for Variant Polyimide Substrates in Ultra-Fine Flexible Circuitry

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Ultra-fine flexible circuitry has been more and more applied in electronic devices due to their fast innovation and the increasing demand on miniaturization,light weight and flexibility in some cases. These devices range from personal electronics to medical instruments,including smart phones,tablets,ultra-thin or/and convertible laptops,wear-able electronics,flexible connecting parts and antennas in all other types. In addition to their flexibility and light-weight advantages,flexible circuits need to incorporate ultra-fine features,maintain good signal integrity at high frequency transmission,and guarantee long-term use with good stability under heat-accumulated conditions. To meet such high requirements,polyimide (PI) has been the most widely used dielectric substrate material due to its very good electronic,physical and chemical properties. It has low Dk and Df to support high frequency signal transmission; low CT E,high Tg and Td to maintain good shape and size stability,thermal stability and processing ability; good chemical resistance,low moisture but good UV absorption. However,due to the superior properties above,it is generally difficult to obtain good PI-plating adhesion on the very smooth PI substrate,which is also required for good signal integrity in the ultra-fine circuitry. Even more challenging is to maintain the plating-PI adhesion at a certain high level after continuous exposure in a high temperature environment. To meet the demand,the company developed a semi-additive process (SAP-FLEX),which was tailored for different kinds of PI films widely used in the current market of the ultra-fine flexible circuitry. Using SAP-FLEX,the PI surface not only maintained a Ra lower than 27n m,but also consistently achieved a uniform initial peel strength from 715 to more than 2055 gf/cm on variant PI substrates. After a 7-day continuous baking test at 150oC,the peel strength can be maintained from 465 to more than 1287 gf/cm. This paper will discuss the SAP-FLEX process flow; its performance on different kinds of PI films; its processing window and the bath life of the adhesion promoter; and its process capability using Six-Sigma tools.

Author(s)
Fei Peng,Ernest Long,Jim Watkowski,William Bowerman
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Library Management for an Ever-Evolving Diverse EDA Tool Industry

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Any company that designs PCBAs that has gone through the throws of an acquisition,CAD tool change or even an EMS company with a varied customer base has to deal with more than one EDA tool and library. Many questions arise. How can the data be managed and re-used so parts built and validated in one tool can be leveraged for future designs in any tools available? How can leaders manage a global library team,share work between teams,monitor and prioritize work based on current status information? This paper will illustrate how multiple libraries can be designed to accommodate a variety of tool flows,and demonstrate a custom tool developed to control the library creation process as well as track revisions that are made to library models. The tracking,history,datasheets,supporting data and communication of this information is also managed within this browser based tool. Many CAD vendors offer specific solutions that are aligned to their tool sets. This solution is independent of any EDA vendor. This web-based tool also provides functionality that allows a global library team to seamlessly share work with workflows designed for custom part creation processes.

Author(s)
Michelle Gleason
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Improved Interoperability Between MCAD and ECAD Design Tools

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During the design of printed wiring boards,our engineers exchange files between the MCAD and ECAD tools in order to synchronize boards and to validate the fulfillment of design requirements. Because numerous iterations of “design then check” involve the generation and then transfer of two types of data exchange format files,and because file management,and therefore configuration control,was mostly absent,this activity was identified as prime for process improvement. Therefore,a custom application was developed to add automation and configuration control to the interoperations between our MCAD and ECAD systems. For the MCAD capability,a vendor supplied programming language application was developed to create new menu items which allow users to skip most of the menu picks previously required to import and export files. In addition,the program supports the automatic identification and tagging of geometric elements such as board outline,keep-outs and coordinate systems with appropriate data exchange attribute types. The ECAD vendor’s Application Programming Interface (API) was used to create new menu items in the ECAD tool that allow users to import and export files with pre-set standard options,instead of having to set dozens of options and layers manually. Utilization of our application allows our mechanical and electrical engineers to focus on design rather than the mechanics of generating,transferring and controlling files,thus trimming valuable time from the printed wiring board design process. This paper will include a process overview including background,use cases,development,and implementation process and cycle time savings.

Author(s)
Robb McCord,Kelli Hosier,Doug Renwick,Mike Rindos
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

PCBA Redesigns Done in the Right Way

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Electronic component end-of-life (EOL) and declining prices are more problematic to industrial than consumer electronic products. Industrial electronic products typically have long product lifecycles. 10 years,15 years and up to 20 years are common. Declining component prices make older products less competitive than newer ones. Component EOL causes production disruptions. The number of components announced for EOL has been on the rise (figure 1). Three options are often employed to mitigate the risks: making a last-time-buy (LTB),using new product introduction (NPI) to replace the old one,redesigning an existing PCBA with the EOL and high-cost components replaced. While none of these options are perfect,redesign provides a balance among development efforts,mitigating EOL impacts,and reducing the product cost2. In this paper,we will present a collaborative approach to redesign in an environment where the internal funding and resources are limited.

Author(s)
San Wong,Murad Kurwa
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Electric Field Control - EOS Mystery Solved

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A new discovery of missing fundamental controls in electronic manufacturing is the cause for most Electric Overstress failures generated by PCB and cable discharge events. This discovery developed a new methodology,Electric Field Control,to reduce the energy in manufacturing and prevent the failures. The results are improved quality,reliability,and reduced failure rates of electronic systems. This fundamental control is needed for manufacturing advanced technologies,systems,and automation.

Author(s)
Michael Stevens
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

X-ray Inspection of Radiation Sensitive Devices Recommended Best Practices for Preprogramed Managed NAND

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Automated X-ray inspection post solder reflow is used to automatically analyze and detect structural defects including solder voids,opens,shorts,insufficient solder and other defects. These defects typically account for 80%to 90% of the total defects on an assembled circuit board. During X-ray inspection,semiconductor devices are exposed to varying levels of dose radiation. Recent commentary has raised questions regarding ionized radiation impact on preprogrammed memory content,specifically Managed NAND. This is of particular concern as memory lithography scales down and more bits are programmed per cell.

Author(s)
Dave Rohona,Vineeth Bastin
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Monitoring the Cleaning Process using Industry 4.0 Methodology

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Assemblers of printed circuit boards seek to provide their customers with high-quality products at the lowest possible cost. The total cost of production must take into account the complete product lifecycle including warranty,recalls and repairs. Systems designed to achieve optimal use of materials and resources through the cleaning process can provide process engineers valuable information for reducing part to part variation and improved quality. Industry 4.0 tracking,monitoring and data analytics systems applied to the cleaning process can give process engineers real-time process information and quality data. An external data acquisition system utilizing analog-to-digital,digital I/O,encoder interface and barcode reading capabilities gives process engineers data on each board processed through the cleaning syst e m. Reflow conditions,wash chemistry control,temperature probes,pressure transducers,pressure switches,DI water resistivity and encoders can be integrated to monitor,track and accumulate data for real-time analytics. Applying analytics to the cleaning process improve quality and consistency lot to lot. Analytics gives process engineers the ability to gain insight from process data monitored and tracked while cleaning production assemblies. They allow engineers to identify common threads and valuable intelligence about system operations. Traceability of cleaning process conditions is a sure proof of compliance. This designed experiment monitors reflow and cleaning process conditions over an extended period. Data analytics will be applied to data from production PCB cleaning operations. Process issues discovered and proactive actions to keep the system in control will be reported.

Author(s)
Mike Bixenman,Ram Wissel,Bobby Glidwell,Mark McMeen
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

Jet Printed Solder Paste and Cleaning Challenges

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In case of broadband technology,component packages and other devices assembled on the PCBs are ever-shrinking,yet demands for quality,precision and reliability remain the same. Thus,how can manufacturers ensure they are sufficiently clean to meet the stringent quality and reliability demands? It has been well documented that flux residues can lead to failure mechanisms such as leakage current,electrochemical migration and dendritic growth and these can negatively impact the reliability of the PCBs. This is especially true in the case of Class 3 assemblies wherein failure is not an option. Recent evidence has shown that it is becoming extremely challenging to consistently deliver the correct amount of solder using the screen printing process. More and more manufacturers in today’s production environment are overcoming this challenge by incorporating jet printing as an additional add-on step to add extra solder paste volume to solve such challenges. Solder paste jetting offers the flexibility to deposit the right amount of solder paste volume on the boards that have both miniature and large size components that need to be soldered adjacent to each other. Typically,jet printing pastes use Type 5 and 6 solder powder compared to Type 3 and 4 usually seen in screen printing processes. This poses several cleaning challenges. First,the presence of oxide for a given solder volume increases exponentially as solder powder becomes finer. Second,jetting pastes typically have a higher flux percentage than printed paste for the same volume and finally,the flux volume decreases in proportion to the pad size and the work load of flux increases for finer pitch applications. Recent findings have shown that solder pastes with reduced metal content and finer powder soldered via jet printing process (Type 5 and 6) results in cleaning challenges as compared to pastes soldered via stencil printing process (Type 3 and 4). Cleaning process settings that produced acceptable results for Type 3 and 4 pastes may produce insufficient results for Type 5 and 6 pastes. Anecdotal evidence with current industry companies indicates that as solder powder becomes finer,the resulting flux residues become more difficult to remove. This paper is part of an initial study executed specifically on jet printing (Type 5) solder pastes using multiple cleaning agents in both spray-in-air inline and batch cleaning systems. The results are further validated by several industry case studies.

Author(s)
Ravi Parthasarathy,Kalyan Nukala,Umut Tosun
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018

A Novel Electroless Nickel Immersion Gold (ENIG) Surface Finish for Better Reliability of Electronic Assemblies

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Conventional Electroless Nickel/Immersion Gold (ENIG) currently available in the market is prone to black-pad defects (hyper-corrosion related failures) associated with de-wetting of solder. ENIG also suffers from brittle solder joint failures. Due to these reasons,there are field failures and reliability concerns of electronic assemblies -component disconnection which lead to overall malfunction of electronic assemblies. Moreover,most ENIG manufacturers/suppliers provide cyanide-based gold chemistry which has health and ecological hazards. The novel ENIG eliminates black pad-corrosion related issues,achieves robust solder joints and provides improved quality and reliability of electronic assembly. Also,it uses cyanide-free chemistry for the immersion gold process making it eco-friendly. This allows manufacturers to consume eco-friendly product while avoiding major field failures and resulting consequences. The root cause of black-pad defects has been identified as hyper corrosion activity at the gold and nickel-phosphorous interface which involves nickel depletion and an enrichment of phosphorous in localized areas. An interfacial engineering approach had been used to successfully eliminate black pad by achieving marked improvement in corrosion resistance. Corrosion tests have been conducted using the potentiodynamic polarization method and tafel plots were generated between novel ENIG and conventional ENIG. The results show 10x improvement in corrosion resistance. This has also led to improved intermetallics at the solder joint leading to robust solder joints and elimination of brittle failures. Ball Shear and Ball Pull Tests (Industry Standard based testing: JEDEC Standard: (JESD22-B115 &JESD22-B117) were conducted on novel ENIG based solder joints and conventional ENIG based solder joints. No solder joints (intermetallics) failures were found with the novel ENIG compared to 80% of failures found at the solder joints with conventional ENIG. Also,the force to induce failure increased by more than about 48% with the novel ENIG compared to conventional ENIG. A novel ENIG is eco-friendly and cost-effective with high corrosion resistance and robust solder joints for better reliability of electronic assemblies.

Author(s)
Kunal Shah Ph.D.
Resource Type
Technical Paper
Event
IPC APEX EXPO 2018