Recently,with significant increasing of solder manufacturing cost due to raw materials,electronics makers are also faced with the same difficulty. And they are finding solutions that save cost by reducing the dross. This paper describes the implementation of a wave soldering system using inert gas. The system based on the PSA-generated nitrogen with residual oxygen levels of 100ppm has low maintenance cost and is very simple to retrofit. In this study,technical results and economic benefits are analyzed by feasibility and actual test. To analyze the effects of comparing nitrogen wave soldering with conventional air condition,we have evaluated the wettability of assemblies,dross and solder joint reliability. The inert wave soldering system shows significant dross reduction and its wettability is better than conventional. Also SEM analysis from solder joint shows good results.

The globalization of markets results in stronger competition with clearly noticeably cost pressure. For companies producing electronic equipment it is therefore of existential importance to reduce production costs whilst maintaining a consistently high quality level of the manufactured products. Manual repair soldering that is expensive,time-consuming and cost intensive is already unacceptable due to the required quality and the reproducibility of the whole manufacturing process.
In addition,densely populated multilayer boards and miniaturised,high-pin-count,fine-pitch devices cannot be efficiently repaired with high quality. "Hidden costs",such as productivity rates,operator training and damaged assembly costs have to be taken into consideration as well.
Special focus has to be set to lead-free applications as manual repair soldering processes can cause enormous thermal problems.
The target,therefore,has to be a zero-fault selective soldering process.
An appropriate printed circuit board design is of the utmost importance here. For example,the shape of the pads and their distance in relation to each other can benefit – or with the corresponding design – exclude the formation of bridges. The distance between a pad to be soldered and an adjoining one that is not to be wetted,also plays a role.
The distance between the individual pins,as well as the length of the pins,are likewise to be taken into account.
Moreover,by choosing the correct soldering nozzle,one can avoid the formation of soldering faults in the automatic selective soldering process.
The design of the soldering nozzle,as for example the shape or diameter,and the soldering nozzle technology used,such as wettable and non-wettable soldering nozzles,play a role here. Additional innovative features,such as debridging knives for example,can effectively avoid the formation of solder bridges,especially in the dip soldering process.
With many practical examples,this paper gives a detailed explanation of the individual points which should be found in the selective soldering process,with regard to the assembly design and solder nozzle technology.

Dross generation has always been a costly issue for the electronics assembly industry. At least half,and in many cases,more than half of the metal (solder) purchased for electronic manufacture is wasted as it becomes tied up in dross. With the advent of lead free solders as well as the spike in tin prices during 2008 the moderate economic pain of dross generation has become acute. In addition to metal cost,lead free solders have become known to exacerbate quality issues such as copper dissolution. A process introduced two years ago cures virtually all problems caused by dross and has now been shown in production to mitigate some of the other issues associated with lead free solders.
This paper will show the true cost of dross in 2008/2009 terms,including metal replacement,loss of efficiency,and safety as well as environmental and quality issues which clearly demonstrate a need for a solution to this problem. In addition to dross elimination the process has been shown in the lab to reduce temperatures for wave and selective soldering and to improve wetting. Updated full production data at major EMS assemblers as well as lab test data will be presented.
In addition to answering the technical questions,why and how the “economics of dross” will be examined and a specific and
significant cost savings scenario will be presented based on the first two years of full production.

The interaction of the drill entry material and the drill tool are critical to producing accurately aligned connections between the different layers in a printed circuit board. The trend towards miniaturization and increased complexity of printed circuits requires the use of micro and small diameter (< 0.3mm) to produce the hole for subsequent plating and circuit interconnection. These smaller tools must endure end-load and torque stresses that cause the bit to deflect resulting in hole mis-registration and/or drill breakage.
The amount of force is dependent on composition of the printed circuit as well as the processing parameters such as chipload and spindle rate. Phenolic and solid aluminum entry materials,used for printed circuit drilling since the 1980s,do not have the properties required to consistently produce a high quality,small diameter drilled hole. An engineered entry material,specifically designed for use with small drills,has been developed and is currently in worldwide use. This engineered entry ensures drill accuracy and minimizes drill deflection. These benefits can improve hole quality and registration and will allow further circuit miniaturization without compromising circuit integrity. Additionally,drill efficiencies benefit from improved drill wear,less breakage,and increased stack heights.
In this paper,data will be presented on the accuracy of holes produced by small and micro diameter drill tools utilizing this new engineered entry material compared to solid,composite,and lubricated entry materials. Hole registration accuracy will be analyzed and statistically compared using the industry standard centroid method. Currently available entry materials will be compared and contrasted. Benefits and recommendations for best processing practices of the engineered entry material will also be discussed.

The transition to lead-free solders has presented significant challenges for the electronics industry. One of the challenges is that typical lead-free soldering temperatures are much higher than those of tin-lead alloys. To maintain the reliability of printed circuit boards (PCBs) subsequent to higher assembly and rework requires new chemistries are required that give rise to materials with high glass transition (Tg) and high decomposition temperatures (Td). Increasing the crosslink density of a resin formulation is a common method used to achieve high Tg. Therefore,higher functionality resins and hardeners are being more commonly used. However,materials with high crosslink densities are also brittle. During the fabrication of PCBs holes are mechanically drilled into the laminate. Drilling of brittle laminates is problematic because of problems associated with cracking,delamination,and drill-bit wear and breakage. Although the drilling equipment,drill bits,and drilling
parameters can be optimized to minimize such issues,additional efforts are desirable to improve the drillability of the PCBs.
Toughening agents are being incorporated into the resin formulations to improve drillability.
This work reports results from the study of incorporating toughening agents into resin formulations and their effect on the toughness and drillability of electrical laminates. This work also reports on evaluation protocols that account for the high temperatures and strain rates that the laminates are subjected to during the drilling process. The objective of the work is to serve as a starting point in creating a toolbox that will help correlate the thermomechanical properties of the resin formulations to the drillability performance of the corresponding PCBs. These correlations can speed the new materials evaluation process relative to the drillability performance without the expensive and time-consuming process of performing extensive drilling studies.

As the requirements for controlled depth micro-vias become ever increasing in today’s market place the best feasible solution
appears to be laser drilling. However laser drilling can be problematic when approaching dielectric thicknesses over 3 mils. FR4 is a composite of epoxy and fiberglass with the fiberglass portion being most problematic for the laser. Since the fiberglass is a weave the laser will have to be adjusted to drill through the knuckle of the glass intersect and hit the capture pad. This is achievable however lateral ablation of the epoxy can occur. This phenomenon can lead to uneven plating and potential reliability issues as can be seen in Figure 1.

As more power is driven through active devices,the integrity of materials used to make the electrically conductive interfaces is becoming ever more critical to the performance of RF radar systems. A variety of technologies including thermal grease,solder and adhesive materials have been used to achieve this interface. In many applications,the use of conductive film adhesives are employed to take advantage of key benefits of the materials such as consistent and uniform bondline control,high electrical conductivity,and lower processing temperatures. This paper will compare the performance of an electrically conductive film adhesive widely used over the last twenty years in the electronics industry with that of a newly developed film designed to provide greater resistance to environmental exposure.

Great efforts are expended by researchers to develop new and better thermal interface materials. In contrast,optimization of the performance of a given material is usually left to more empirical efforts. Unfortunately,interactions between the many parameters affecting performance make the design of experiments required for empirical optimization impractically large. We are conducting systematic mechanistic studies on the combined effects of materials selection and process parameters such as normal forces,assembly speeds,and thermal profiles on bondline macro/microstructure and thermal performance.
The most common type of medium/high-performance thermal interface material is undoubtedly that of polymers filled with
conductive particles,most often Ag. However,these materials rarely perform as well in a practical application as predicted based on manufacturer supplied data sheets. This is usually ascribed to defects such as voids,porosity and filler distribution heterogeneity. Such defects can be minimized by process optimization,but we also believe that we can learn to tailor some level of heterogeneity to our advantage. In fact,a thermal resistance two and a half times lower than that predicted based on the data sheet has already been demonstrated for one high-end commercial material. Moreover,this can be compatible with a practical manufacturing process.
The present paper offers a discussion of results of systematic process studies on commercial filled polymer materials,including correlations between process parameters,defects and final bondline thickness. Important insights were derived from a new technique allowing the in-situ measurement of bondline electrical resistance during processing. The indication is that the dominant pathways for heat transport are provided by chains of Ag particles in good electrical contact with each other. However,typical thermal conductivities of adhesives with,say,30% Ag (by volume) are lower than that of pure Ag by a factor of fifty or more. The reason for this is that a relatively small fraction of the Ag particles are in conducting chains; in many instances heat must travel through interfaces between the Ag and thin coatings or layers of polymer. Indications are that the fraction of metallic (electron) transport (transport through chains of Ag) can be enhanced in an optimized assembly process.

Ideas,manufacturing processes,materials and components that were in the realm of science fiction a few years ago are now being adopted into mainstream PCB products. Devices are getting smaller,boards are getting denser,and parts are getting more complex. Array packages are becoming more popular. On the near horizon we see the popularity of high density interconnect rising. Solder Jet printing and cold attachment rival traditional solder printing. Manufacturers are building smaller and smaller quantities – even batches of one! What does this all mean for traditional Automated Optical Inspection (AOI),which grew up in a world of technologies that might be superseded soon? In this paper,we discuss the strengths and weaknesses of AOI given these significant changes in PCB materials and manufacturing methods. We also examine alternative inspection methodologies that may complement or replace AOI.

Prediction of accurate values for insertion loss (S21) on printed circuit boards has become ever more critical to SI modeling as signal speeds required for next-generation networking equipment move into the 10+ GHz range. Existing industry-standard insertion loss estimation techniques assume that the copper conductors (PCB traces) are smooth,when in fact they are not. The error thus induced is less significant at lower speeds,but cannot be ignored at frequencies above a few GHz. Accurate estimation of PCB laminate dissipation factor (Df) is another goal integral to SI modeling. Industry-standard methods again assume the smooth copper case,with consequent frequency-dependent error introduced into extracted values of Df. This paper describes a set of stripline PCB test vehicles used to correlate copper trace surface roughness to insertion loss. The main errors induced in extracted values of Df resulting from increased conductor losses due to surface roughness have been analyzed.