Recently,wafer bumping using solder paste with very fine solder powder has come into focus as more cost effective than
conventional sputtered or plated methods. This additive method revolves around a stencil printing process similar to
conventional SMT with the exception of the extremely small pitch and desired deposit size. The results and findings of a
print process array of experiments are presented that focus on optimal print deposit area consistency. Variables such as
squeegee type (polymer vs. metal),separation speed and snapoff distance are compared and contrasted.

SPC data has shown that the solder paste printing process is the primary source of soldering defects in SMT assembly.
Consequently,verification of the specified printing properties of solder paste is of paramount importance in the pursuit of
higher quality goals,and higher overall yields. Process variations such as temperature fluctuations in the printing area,
changing printing speeds and varying stencil life have been recognized as important parameters in the characterization of
solder paste,but until today,they never actually have been resolved in a reproducible rheometric methodology.
Moreover,printing developments in recent years,such as the introduction of closed print heads,the apparent diversity in flow
behavior of solder paste on electroform versus laser-cut stencils,and specific adhesion to Au-pads,apparently cannot be
characterized by the traditional single point viscosity measurement that is still used in many facilities today.
Discrepancies in the flow dynamics of different types of solder pastes used in closed print heads clearly show that the vertical
pressure imposed by these systems exerts a major impact on material performance. This phenomenon supports the idea of
characterizing the flow properties of solder paste by controlled shear-stress mode methods rather than by traditional
controlled shear-rate methods.
This paper describes a rheometric QC-routine for solder paste that takes approximately 16 minutes,and is based on the
combination and automation of two different methods. The first method is run in oscillation mode and provides a rheometric
characterization of slumping and tackiness. This procedure is automatically followed by a method that is run in rotational
mode. The latter provides an index (iv) of shear-rate at different settings of controlled stress. The second index (it) provides
viscosity versus different temperature settings,also measured in controlled stress mode. The combined index (ivt) provides a
full indication of the printing properties of a solder paste in one single number. In order to ensure compatibility with
traditional methods,this routine also provides a single point viscosity determination.
The new QC-routine described herein is a fairly quick and cost-effective testing method that yields precise and reproducible
results usable in an SPC program. Moreover,it provides a complete overall picture of the printing properties of solder paste,
including its numeric classification regarding slumping,tackiness,its performance at different speeds and its sensitivity to
temperature variation.

As Electrostatic discharge,humidity can have a bad impact on assembly quality. It requires environmental conditions and
process controls but also risks knowledge. To overcome humidity issue,parts (PCB or components) need to be baked to
remove moisture. Baking drawback is the wettability issue especially with thermal sensitive PCB finishes. Can this
wettability issue introduce reliability defects? Solectron has launched on this topic a project called Aquaboard. This project
mainly deals with the PCB materials behaviours towards humidity,and the impact of different parameters such as baking on
the solder joint reliability. The project took place in two steps. The part 1 is about PCB materials behaviours,mainly the
baking and storage efficiency. Several curves have been drawn for most of the PCB materials (paper,E-glass,aramid,phenol,
epoxy,BT,polyimide,hydrocarbon…): baking curves (from 80° to 120°C),absorption curves (ambient atmosphere,<5%
RH,dry pack storage,85°C-85%RH). The part 2 is a test vehicle to see the impact of baking,assembly process,PCB finish,
atmosphere,design (DFR) on wettability,spreading,voiding,reliability,aluminium bonding…

The SMT (surface mount technology) assembly process for 0.4 mm pitch CSP (chip scale package) components was studied
in this work. For the screen printing process,the printing performance of different solder pastes,aperture shapes and sizes
was investigated. Square apertures and a fine particle size in the solder paste provided a better paste release. Besides
optimizing the printing process capability and minimizing the printing defects such as bridging and missing paste,the total
volume of solder consisting of the paste and the solder ball has to be considered in order to maximize the final process yield.
For the pick & place process,the accuracy required for the placement equipment was determined by studying the selfalignment
of the lead-free CSPs (with Sn/4.0Ag/0.5Cu balls) during the reflow process using lead-free Sn/3.9Ag/0.6Cu paste.
The components were intentionally misplaced up to ~50% off-pad. After reflow,the x-ray inspection showed that the
components had aligned to the pad. By considering the stack-up of the PCB (printed circuit board) pad location and size
tolerances,the solder paste printing tolerances and the placement tolerances,the required alignment accuracy for the pick &
place equipment was established to meet the total process capability requirement.

In order to understand the reaction mechanism of an auto-catalytic type gold plating bath,it is necessary to recognize the
following reactions --- oxidation of reducing agent,gold deposition and dissolution of the underlying nickel deposit.
Therefore,we have been studying the rest potential of the reducing agent,the rest potential of gold deposition and the rest
potential of nickel dissolution,regarding two different types of auto-catalytic gold plating solutions. One is a neutral pH type
non-cyanide auto-catalytic gold plating bath that has been newly developed for PCBs,and the other is an alkaline type autocatalytic
gold plating bath that is currently being used in the ceramic PKG industry. From our evaluation results,we
discovered that a neutral type gold plating bath is apt to dissolve the nickel layer compared to an alkaline type. We also
discovered that this dissolving character depends on the reducing agent type,which is contained in the neutral type autocatalytic
gold plating solution. Furthermore,observation results showed that the characteristics of the immersion gold bath,
which is utilized as a strike gold bath for auto-catalytic gold plating,affect the characteristics of the total deposit. In this
study,we were able to confirm that it is possible to obtain an electroless Ni/Au plating film with excellent wire bondability
and solder joint characteristics by utilizing a newly developed neutral pH auto-catalytic gold plating process.

A novel electrochemical plating process for depositing gold and silver surface finishes using environmentally benign,
organic-based solutions as the plating bath is being investigated. The plating bath solution consists of an extractant and a
diluent of the types used in conventional organic solvent extraction. The organics are very poor electrolytic conductors and
can sustain only short range electrochemical reactions. The deposition mechanism involves the dissolution of a less noble
substrate metal with the simultaneous deposition of more noble metal particles on the surface of the substrate,similar to
immersion plating in an aqueous solution. Feasibility of the concept was demonstrated by loading the organic extractants
with gold or silver in the form of complexed ions. The metal bearing organic liquid was then placed in contact with blank or
patterned copper and nickel surfaces commonly used in the printed circuit board industry. Deposition of a continuous,
adherent gold and silver surface finishes from the organic liquid was achieved with the proper processing conditions. Gold
and silver films were deposited only on the exposed metallic surfaces of the substrate,indicative of a selective area
deposition process similar to immersion plating. Scanning electron microscopy (SEM) indicated that the films were
composed of nanometer sized particles.

Process,Process,Process – these words must ring loudly in our ears,and must be at the forefront of lead free
implementation. The smaller process windows dictated by lead free alloys are going to put greater demands not only on
reflow equipment,but also on first article inspection equipment and procedures. This article will highlight the typical process
concerns associated with lead free alloys with respect to proper first article inspection,qualification of a lead free SMT line,
and adherence to ISO and Six Sigma Quality Management Philosophies. An effective quality control program is completely
dependent on the capability of discovering all possible process problems in order to insure prevention. The enormous
financial and reputation costs of warranty failures faced by leading mass production manufacturers can be greatly reduced by
improving the first article inspection process.
Much has been published concerning the smaller process windows associated with lead free alloys,and their influence on
reliability issues. It is suffice to say that the soldering process up until today has been most forgiving to process problems.
Lead containing solder pastes have known extended soak ranges from 60 to 120 seconds,as well as broad acceptable peak
ranges from 205°C to as high as 255°C. Large temperature deltas in the current soldering process were less problematic for
solderability and reliability. Lead free alloys will see much smaller process windows for soak,and a peak range from 230°C
to 250°C. Working outside these specified process windows will have a negative impact on solder joint integrity,component
safety,and ultimately on reliability.

The popularity of low voltage technologies has grown significantly over the last decade as semiconductor device
manufacturers have moved to satisfy market demands for more powerful products,smaller packaging,and longer battery life.
By shrinking the size of the features they etch into semiconductor dice,IC manufacturers achieve lower costs,while
improving speed and building in more functionality. However,this move toward smaller features has lead to lower
breakdown voltages and increased opportunities for component overstress and false failures during in-circuit test.
The chief reason is that testers designed for boards that traditionally operated with a power supply voltage of 5V are still
being used on new generation ICs,which operate on 2.5V,1.5V,or even 0.8V. These traditional in-circuit testers often do
not have the accuracy,safety,and reliability features that are required to test low voltage technologies.
This paper discusses the challenges of performing powered-up vector testing of low voltage technologies on traditional incircuit
testers and describes the safeguards that are necessary to ensure that test vectors do not violate the increasingly tight
specifications of low voltage parts.
It also describes the in-circuit test features that are most important for testing low voltage technologies: independently
programmable,high accuracy driver/sensors; real time dynamic backdrive current measurement,programmable backdrive
control,specialized digital controller; and multiple level digital isolation.

Evaluation of printed wiring boards (PWBs) for thermal reliability during assembly and rework operations by Thermal
Mechanical Analyzer (TMA) “T-260” testing has been an accepted practice for many years. Test procedures are specified in
IPC-TM-650-2.4.24. It is common to see finished PWB T-260 requirements of 2 minutes or greater. In general PWBs
produced using FR4 substrates pass this requirement. Recently,however,T-260 results from PWBs of thickness greater than
8mm,produced with high Tg FR4 substrates,using industry standard TMAs supplied by two manufacturers have
delaminated in less than 2 minutes. Samples 4mm thickness or less produced with the same substrate materials consistently
survive. Significant variation of the measured glass transition temperature (Tg) has also been observed. Tgs measured by
TMA for the very thick PWBs are significantly lower than those measured for thinner PWBs.
When T-260 samples are examined following the testing,the delamination is always observed to be on the top few layers of
the PWB. This is true even for thin samples. The sample is significantly degraded at the top surface with the resin bubbled
and charred while the bottom of the PWB resting on the sample stage is not significantly different from the pre-tested sample
(Figure 1). These results suggest that the thickness of the sample and instrument used are influencing the T-260 time to
delamination. To better understand the influence of the sample thickness and instrument set-up on T-260 and Tg results
several studies were performed.

Non-destructive testing during the manufacture of printed wiring boards (PWBs) has become ever more important for
checking product quality without compromising productivity. Using x-ray inspection,not only provides a non-destructive test
but also allows investigation within optically hidden areas,such as the quality of post solder reflow of area array devices (e.g.
BGAs,CSPs and flip chips). As the size of components continues to diminish,today’s x-ray inspection systems must provide
increased magnification,as well as better quality x-ray images to provide the necessary analytical information. This has led to
a number of x-ray manufacturers offering digital x-ray inspection systems,either as standard or as an option,to satisfy these
needs. This paper will review the capabilities that these digital x-ray systems offer compared to their analogue counterparts.
There is also a discussion of the various types of digital x-ray systems that are available and how the use of different digital
detectors influences the operational capabilities that such systems provide.