Enhancing Component Density in PCBs: A Study on Molded Interconnect Device Integration

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The increasing demand for higher signal density and miniaturization in electronic devices has driven the use of multilayer printed circuit boards (PCBs), which stack multiple circuitry layers to achieve complex designs. However, these conventional multilayer approaches restrict component placement to the outermost layers—top and bottom surfaces—apart from using embedded components which could introduce additional assembly and reliability challenges. This paper proposes a novel method utilizing 3D molded interconnect devices also known as mechatronic integrated devices (3D-MIDs) to create a three-dimensional PCB component stack, providing additional layers of usable real estate for component placement, thereby addressing the spatial constraints inherent to traditional multilayer designs. Various design features and form factors are evaluated to determine their effectiveness for different applications, with a focus on maximizing volumetric efficiency, mechanical stability as well as electrical and thermal performance of the system. The substrate material selection is analyzed to balance manufacturability and cost-effectiveness with mechanical and thermal properties through comprehensive mold flow analysis and thermal simulations. The paper also examines the compatibility of MID-based PCB stacks with state-of-the-art surface mount technology (SMT) manufacturing processes, including pick-and-place systems, and reflow solder processes through experimental analysis. The findings highlight the potential of MID-based PCB stacks to enhance PCB design by enabling more compact, and versatile electronic systems, suitable for a wide range of applications through its potential for a significant reduction in assembly time and overall complexity of the end product.

Author(s)
Stephan Schmidt, Gabriel Schneider
Resource Type
Technical Paper
Event
APEX EXPO 2025

A Method for Real-Time Rejection of Defective Components During the Pick and Place Process Using AI Technology

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This paper presents a real-time, AI-driven defect detection system designed to enhance quality control in electronic assembly, providing manufacturers with precise, customizable screening parameters. The system utilizes a two-stage approach: an initial high-sensitivity detection phase that aligns with IPC-A-610 standards, followed by a secondary defect classification stage, activated only on approximately 200 defective parts per million (ppm). This configuration enables high-speed processing with minimal impact on computational resources, making it suitable for high-throughput environments.
The approach includes a “quality control knob,” allowing manufacturers to adjust defect thresholds, selectively target specific defect types, and apply tailored inspection parameters to different component classifications. This flexibility allows a balance between high-quality standards and production efficiency, reducing attrition rates and minimizing waste. For example, setting the quality threshold to meet IPC-A-610 standards results in a defect rejection rate of 207 DPM at an attrition cost of $0.62 per million components, while more lenient settings can reduce attrition to 59 DPM, costing only $0.18 per million components. This enables manufacturers to make informed trade-offs between quality and cost.
In addition to improving product reliability, the system reduces rework, scrap, and the environmental impact associated with production inefficiencies. Test results demonstrate the system's effectiveness in detecting diverse defects such as corrosion, foreign object debris (FOD), bent leads, and structural damage, allowing manufacturers to uphold stringent quality standards. This flexible, adaptive inspection method not only enhances quality control but also advances sustainability in electronic manufacturing by significantly lowering defect-related issues.

Author(s)
Eyal Weiss
Resource Type
Technical Paper
Event
APEX EXPO 2025

CFX Drives the Digital Strength of the Industry and Leads the New Era of Intelligent Manufacturing

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Electronics assembly manufacturers, in pursuit of diverse products and sustainable development, continue to strive for efficient, energy-saving, and reliable products and solutions. Data collection, data governance and the completion of manufacturing data infrastructure are the cornerstones of digital transformation and data applications.
In this contribution, we introduce how to use the IPC-CFX standard to complete data collection in the manufacturing process, establish the verification of the supplier's equipment data capability, and share the application scenarios based on CFX data to help us better realize intelligent manufacturing. We hope to have a certain reference and inspiration for everyone in the implementation of intelligent manufacturing.
Since 2015, we have been advancing the construction of smart manufacturing projects within global manufacturing system, creating several model factories and continuously upgrading technology and applications. In the process of promoting smart manufacturing, the IPC-CFX standard is applied, and in conjunction with production control, manufacturing operations, and other scenario requirements, a factory networking standard is gradually formed. This further influences equipment suppliers to provide support for IPC-CFX communication-enabled devices.
In SMT line, it refers to a method used in electronics to mount components directly onto the surface of a printed circuit board (PCB) production line, SMT line applies smart networking solutions based on industry standards to address issues such as inconsistent information models provided by different brands' equipment, making it challenging to integrate industry applications. By using transmission protocols to obtain data from both IPC-CFX-compliant and non-compliant equipment, a factory management system manages this data uniformly and then performs data analysis.
After observing the capabilities of equipment networking, a smart manufacturing technology team upgraded its planning. Instead of requiring networking capabilities only in the post-installation market, electronics assembly manufacturers now mandate that equipment must meet factory machine networking standards upon entry. This move effectively pushes the industry forward, particularly for equipment manufacturers, ensuring that they have standardized information models and connectivity capabilities from the source.

Author(s)
Eunice Lin, Lynn Chuang, Jerry Tseng, Peter Chen, Fengchun Wang, DA Zhang, Choyueh Yu, Tzung Shian Li
Resource Type
Technical Paper
Event
APEX EXPO 2025

Cutting-Edge Pulse Plating Solutions for Uniform Deposition of Copper with Enhanced Reliability in State-of-the-Art Server Technology

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Artificial intelligence (AI) is driving significant growth in the server market, spurring an urgent need for innovative and efficient solutions in the production of integrated circuit substrates (ICS). Focusing on ensuring electrical conductivity, reliability, and overall performance of the circuits, electrolytic copper plating is a critical aspect of ICS production. Uniform copper deposition on surface and particularly in challenging through-holes, is essential for high-frequency and high-density computing applications.
This paper explores recent advancements in electrolytic copper plating technologies, focusing on the use of pulse plating in vertical conveyorized equipment to address these. The latest generation of such equipment features advanced pulse plating rectifiers, which apply varying current densities through precise pulses rather than a continuous current. Specialized plating additive systems need to be tailored for this advanced plating process, fine-tuning the deposition characteristics to improve the overall uniformity and physical properties of the plated layers.
The integration of pulse plating within latest generation vertical conveyorized plating (VCP) equipment together with the optimised additive system not only enhances the structural integrity of the substrates but also reduces the risk of electrical failures due to insufficient copper coverage.
The significantly increased throwing power ensures deep and uniform copper deposition in even the most challenging through-holes designs of ICS, with high hole density at die areas and lower densities around. The superior copper uniformity on the surface of the core and throwing power achieved through this method surpass industry standards for electrical conductivity and durability, meeting the stringent demands of the AI-driven market.

Author(s)
Dirk Ruess, Mustafa Özkök, Akif Özkök, Patrick Brooks
Resource Type
Technical Paper
Event
APEX EXPO 2025

Evaluating PCB Fabrication Capabilities for Compliance with SFF-TA-1002 and CEM Connector Specifications

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As Input/Output (I/O) bandwidth continues to double every three years[1], the reduction in connector pitch to 0.6 mm, exemplified by SFF TA-1002 [2], imposes stringent design requirements on Printed Circuit Board (PCB) fabrication processes. This project seeks to understand and mitigate the challenges arising from these evolving specifications.
The project identifies the precision required for connector land patterns as a key driver of new manufacturing processes. It aims to provide product designers with the information necessary to ensure PCB producibility with predictable quality levels when using high bandwidth connectors.
Major Objectives
1. Assessment of PCB supplier capabilities, risks and mitigation strategies.
2. Development of quality assessment and dimension control recommendations.
Connector requirements are challenging for some fabricators with expectations of future requirements increasing based on connector supplier expectations. In a survey, 83% of PCB fabricators reported experience with 0.6 mm pitch PCB designs. All can meet “U” slot width requirements, but less than half achieve a Cpk of 1.33. For PCIe 5.0 products, all PCB fabricators have experience and 50% can meet the 0.13 mm max tie bar length requirement with a Cpk of 1.33. Connector suppliers anticipate needing tighter pitches and vias under the contact area by 2025-26, posing potential challenges to the PCB industry. Survey results indicate that not all PCB fabricators and board designers are all aware of the manufacturability requirements.

Author(s)
Joe Fuller, Sudip Thomas, Dr. Zhineng Fan, Jim A Huff, Steven R Ethridge, Eric Ling, Bob Hall, Mr. Mark A Schaffer
Resource Type
Technical Paper
Event
APEX EXPO 2025

High-Performance Phase Change Metal TIMs - Part II

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Phase change metal (PCM) thermal interface materials (TIMs) are low melting point metal alloys that are solid at room temperature. The melting point of PCM TIMs should be below the operational temperature of the application so they can be in the liquid phase during operational hours. Metals generally have high thermal conductivity, and when they are liquid, their interfacial resistance is very low, which results in extremely low thermal resistance. In the first part of this paper (presented at IPC APEX Expo 2023), indium-gallium (InGa) PCMs were presented. In this paper, other gallium-based PCMs are discussed, as well as novel PCMs that don’t contain gallium. Gallium is very aggressive to aluminum, which is very often used as a base metal for heat-sinks, and because of this, gallium-based materials can’t be used with any aluminum heat-sinks. This paper will show how both gallium-based and gallium-free PCMs will perform during power cycling. Effective thermal conductivity and thermal resistance of those TIMs were tested in a standard ASTM D5470 system. A set of reliability tests (thermal cycling and HAST testing) were preformed to assess how they would affect the TIM’s properties. Since PCM TIMs are liquid during operational hours, they have to be contained to prevent leakage. Different types of barriers can be used for this damming, which are discussed in this paper.

Author(s)
Miloš Lazić, Ricky McDonough, Ph.D., Bob Jarrett
Resource Type
Technical Paper
Event
APEX EXPO 2025

Copper Salt-Based Sinter Paste for Use Under Air and Pressureless Conditions

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In the field of power electronics, modern components have to resist increasing thermal stress and need a higher life expectancy even under harsh conditions. Even if temperature-stable components are available, lead-free solders for this temperature ranges are not.
Here, another technology like sintering is needed. Sintering is established using silver-based sinter pastes to connect silver or nickel and gold surfaces, using higher temperatures and pressures, often using inert gas. Sintering copper surfaces faces many problems even with well-established silver sinter pastes. Switching to copper-based sinter pastes more problems occur, because this pastes often require reducing atmospheres.
For this case, the development of copper salt-based sinter pastes is being worked on, containing a proper reducing agent, acting as well as an activator. Using a reducing agent allows to perform the sintering process in normal atmospheric and pressureless conditions. A temperature of 250° C must be exceeded to initialize the reducing process. Due to the oxophilic character of the sintering flux and the use of a metal salt as metal source, binding to base metals or even oxide terminated surfaces like glass are favored compared to noble metal surfaces like silver.
Using different metal salts in the formulation of the pastes lead to the resulting alloys in the resulting sintering structure. Depending on the metal salts combination, a slight adaption of the reducing agent might be necessary.

Author(s)
Batcheva Domínguez Tellez, Thomas Kolossa, Dr. Andreas Sy, Thomas Ruch
Resource Type
Technical Paper
Event
APEX EXPO 2025

Wearable Device Friendly Light and Moisture Dual Curable Conformal Coating

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Encapsulants and conformal coatings are used to improve and extend the reliability of printed circuit boards against environmental conditions. There is high interest in using light-curable materials due to their process benefits over conventional technologies, including no need for use of solvents, higher throughput, space savings, and lower operating costs. Light and moisture dual-curable encapsulants and coatings were developed to ensure the curing of the material that might flow underneath components on circuit boards. The use of light-curing in wearable consumer electronics has been limited due to skin sensitizer ingredients used in most light-curable formulations. Flexible circuit boards (FCBs) are becoming essential parts of wearable devices that are designed to conform to body parts. A flexible light and moisture dual curable encapsulant/ conformal coating was developed that minimizes skin sensitizing ingredients and still perform well in reliability tests. In this paper, skin sensitizer ingredients, physical properties, and reliability testing such as heat and humidity (85oC, 85% relative humidity), thermal cycling (-40oC to +85oC), and chemical resistance are discussed. These results are compared against other light curable encapsulants/conformal coatings.

Author(s)
Dr. Aysegul K. Nebioglu, Nilsa Moquette, Dayu Chou
Resource Type
Technical Paper
Event
APEX EXPO 2025

Design and Performance Study of Low Carbon Footprint Bio-based Copper Clad Laminates

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Petroleum-based polymer resins are widely used in electronic base materials for their excellent insulation, heat resistance, chemical resistance, and processability. In recent years, the increasing depletion of petrochemical resources and the global warming issues caused by their extensive use have become increasingly severe. Therefore, the development and utilization of sustainable bio-based materials are of great significance in terms of resource conservation and environmental protection. This study designed and developed bio-based copper clad laminates (bio-based CCLs) using bio-based epoxy resins and bio-based curing agents as raw materials, overcoming the common performance issues such as poor thermal stability of bio-based polymer resins. The performance of the developed bio-based CCLs and their processed printed circuit boards (bio-based PCBs) were tested and analyzed. The results show that the bio-based carbon content of the developed bio-based CCL is about 25%, and its main properties such as glass transition temperature and thermal resistance are comparable to those of petroleum-based CCLs of the same grade. Compared with equivalent petroleum-based CCLs, the carbon footprint of the developed Bio-based CCL product over its lifecycle has been reduced by approximately 20%, and its PCB processability and reliability are found to be good.
Key words: Petroleum-based, Bio-based, Carbon Footprint, CCL, PCB

Author(s)
Wei Lin, Boming Xiong, Shuxian Fang, Guoyang Huo , Yaode Zeng, Zhongqiang Yang, Yi Wang
Resource Type
Technical Paper
Event
APEX EXPO 2025

Thermal Profiling of Pre-heater Configurations with Added Convection to Determine Heating Effectiveness for Selective Soldering

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The quality of through-hole soldering joints is determined by the percentage of solder fill within a printed circuit board (PCB) hole. Good wetting is required to achieve this via heating and optimal flux selection. The applied heat activates the flux chemistry facilitating its surface cleaning action.
Traditionally, either infra-red (IR) heaters or convection ovens are used for this purpose. While IR is fast, it is surface-sensitive, can be reflected, and its penetration depth is dependent on wavelength. Convection can homogenously heat larger assemblies but is comparatively slow. Combining these methods will allow a pre-heat station to quickly heat a variety of board configurations.
Printed circuit boards with varying levels of copper traces have been profiled. Thermal profilers with thermocouples were used to measure the top and bottomside temperature profiles.
Varying arrangements of fast response shortwave IR topside and bottomside pre-heat in both open and closed loop configurations have been used. Varying power levels and target temperatures were used for each method, respectively. An air blower system was then fitted to allow for added convection heating for each of the above configurations.
This parametric study will provide key insights into the most efficient methods to heat printed circuit boards for selective soldering. IR heating provides the most immediate surface heating effect, via radiative transfer, and the addition of air blowing has been explored in conjunction. Machine configuration must be explored to enhance efficiency. The goal is to replicate the uniform surface and through-thickness heating typically achieved with convection.
Keywords: Selective soldering, pre-heat, profiling

Author(s)
Samuel J. McMaster, Jonathan Wol, Nigel Monk
Resource Type
Technical Paper
Event
APEX EXPO 2025