Warpage Issues and Assembly Challenges Using Coreless Package Substrate
Coreless technology in package substrate has been developed to satisfy the increasing demand of lighter,smaller and superior electrical performance regarding as the future trend in electronic application. However,there are major challenges of reducing coreless substrate warpage in terms of both substrate manufacturing and assembly process. Substrate manufactures typically provide substrate warpage within satisfying customer’s specification which does not allow much margin left in assembly considering the number of reflows and curing profiles which the package undergoes during assembly. However,it is very difficult to provide satisfying this level of warpage because coreless substrate is one-third as thin as conventional one and does not use stiff core material. The key element for success in coreless technology is to solve the warpage issue at manufacturing site because the decrease of bare substrate warpage is important to improve the assembly yield. To figure out these problems,design optimization,mechanical/thermal treatment and low CTE material are suggested in this study. Final part discusses assembly result and issue for future work.