With ever increasing data transfer rates,insertion loss has become a limiting factor on today's systems.
Insertion loss can be separated into dielectric loss and copper loss. While dielectric loss can be influenced by choosing a base material with the appropriate dissipation factor,copper loss is more complex.
Copper loss is a function of bulk resistivity,cross sectional area of the conductor,conductor surface roughness as well as frequency. Conductor surface roughness is influenced by the copper foil type (STD,LP,VLP,…) and the oxide replacement process during PCB manufacturing.
To better understand the contributing factors to copper loss,the influence of the copper foil roughness,'as received' and 'modified by the oxide replacement? was evaluated.
A DOE was performed with three different types of copper foils (RTF,VLP,ultra low profile) and ten different oxide replacement chemistries. Insertion loss as well as impedance and DC line resistance were measured on the various test samples. The results were compared using a statistical ANOVA approach.
The paper describes the performed measurements and will discuss in detail the influence of copper foil,oxide replacement,line width and copper thickness on the key parameters impedance,DC line resistance and insertion loss. An 'analysis of variances process' is used to understand the level to which the contributing factors affect the electrical parameters.
A measurement at two different frequencies is used to demonstrate the varying influence of the independent variables on insertion loss.

In high frequency circuit boards PTFE is widely used as a substrate material. It offers very low dielectric constant and low losses. However,it is relatively expensive to fabricate,making the cost of PTFE laminates high. In addition PTFE-based circuit boards are composite materials with glass fiber reinforcement and thus not isotropic. Glass fiber also increases losses compared to raw PTFE.
We have developed a new proprietary thermoplastic substrate especially for high frequency circuit boards. This polyphenylene ether (PPE) based substrate offers a low dielectric constant (dk),2.55,and low dielectric loss (df),0.002,in 1 to 5.5 GHz frequency range. It is unfilled,which makes the properties both isotropic and completely homogeneous throughout the substrate. This new material can be processed by typical thermoplastics processing methods,such as film and sheet extrusion and injection molding. Among thermoplastics,PPE is inherently low burning material and it can be easily made flame retardant (V0). However,the addition of flame retardant was found to slightly increase the dielectric loss at high frequencies. This plastic material exhibits a high glass transition temperature,Tg,around 200ºC. This also gives the highest short term use temperature. There is no crosslinked structure to support the substrate above Tg. Processes requiring higher temperatures,such as conventional lead free reflow soldering or wave soldering can not be used.
Because of the very good dielectric properties the material is intended for high frequency applications where the number of required solder connections is limited. One of these is a broadband base station antenna. The performance of this new material as a UMTS/WCDMA antenna for 1.92 – 2.17 GHz frequency band was evaluated with very promising results. First,a patch antenna was designed based on simulations and then the demo antenna was built. The measured performance coincided well with the simulation data. Design of a full size base station array antenna demonstrator is also presented.

In high mix (250+ Assemblies) environments,ensuring small batches are delivered in a timely yet flexible manner without large levels of safety stock and WIP requires the very best of LEAN Manufacturing practices. Dynamic Process Control's (DPC) Material Reservation Manager (MRM) has been designed to provide the tools for major reductions in floor stock and the ability to manage production schedules to maximise utilisation and productivity in this highly dynamic environment.
In line with the current need to dissect volumes into small (<100 unit) Kanban driven batches,using these tools can minimise losses from unplanned changeovers due to missing or un-locatable material.
Any combination of Kanban and ERP/MRP driven order batches can be dynamically loaded automatically in real time. In this example the operators on each of 5 SMT lines perform 'what if's' on each batch. Tracking material reels,matrix trays and sticks loaded on SMT equipment or stored in line locations outside materials controlled storage,we can then check there is sufficient material available to complete the order. If insufficient material is available on the line but is available in material's storage,it is reserved,picked and transferred to the line in time for the orders scheduled start. Shortages preventing production are flagged and the order rescheduled.
Using these tools can reduce waste and eliminate lost time waiting for parts that have been depleted or changing over due to those parts not being available. Every item of material outside of material stores is tracked as it is being used allowing for the application of material FIFO,the use of part used material before new and the real time enforcement of rules such as 'use by dates' and quarantines.

As the assembly of electronic products becomes more automated the collection,storage and retrieval of electronic data demands additional software tools to manage data. The wide spread use of web and email in the delivery of electronic data requires close integration of these data sources to an organization’s data system. A number of new and sophisticated functions are now available within current office software and operating systems but many of these features have gone unnoticed by many users. The purpose of this paper is to identify some of these functions and explain how they can be used to help manage engineering data.

Interest in the adhesive strength of PCBs has recently come to the forefront of the industry. This has been driven by the advent of lead free soldering processes which severely stress the mechanical properties of the board. For sometime,the accepted test method for measuring adhesion in the PCB industry has been the widely used peel strength test. At the same time,it has been common knowledge within the industry that this technique has been less than adequate in guarding against delamination failures during reflow and wave soldering. In recognition of this deficiency,a new test was recently introduced and the test method is now a part of IPC 650; the so called “T260 Method” in which a thermal event is imposed that causes a delamination of the test specimen. The purpose here is to compare the stress field associated with a board delamination to that generated by the peel test and the T260 test.
This analysis will initially give attention to a first principals characterization of the stress field associated with a uniform,free expansion of a PCB,such as in the reflow process. If severe enough,this will result in a delamination. The stress fields produced by the Peel and T260 tests are then analyzed and compared to that of a free expansion. As suspected,the stress fields of the two test methods are significantly different. The stress field created by the T260 test has the same geometry as the free expansion,but a scale factor is required for a total correlation.
Finally a novel technique is suggested for characterizing the layer-to-layer structural integrity of a PCB does not suffer these drawbacks.

The High Density Packaging Users Group (HDPUG) Consortium has completed an experiment to investigate the effect of non-filled microvias in SMT solder joint pads and the associated solder voids on Pb-free solder joint reliability. Solder joint fatigue life for identical components soldered to pads with and without microvias was compared using air-to-air thermal cycling. Testing was carried out using three different BGAs having solder ball sizes ranging from 0.46mm diameter to 0.89mm diameter as well as a 72 I/O QFN. Weibull plots of the failure distributions are presented along with failure analysis and correlation of void size as measured by X-ray and observed cycles to failure.

Two different temperature cycling profiles were used to compare the thermal fatigue reliability of Pb free and SnPb solder joints in 16 different,high strain surface mount (SMT) packages. In some applications,high strain Pb free (SnAgCu) components are expected to fail earlier than the equivalent SnPb version. In this program,test results were compared for a 0-100°C thermal cycle used often for evaluating high reliability applications to those of a comparatively mild accelerated thermal cycle condition of 20-80°C. A total of 6957 cycles was completed in the 0-100°C testing and a total of 9792 cycles was completed in the 20-80°C thermal cycling. The program was completed after over more than two years of elapsed test time. Weibull analysis,acceleration factors between the tests and failure analysis are included. The results indicate that the SnAgCu (SAC) components that create a high strain in thermal cycling tend to perform worse in 0-100°C testing than identical SnPb soldered components. However,when the strain is reduced by testing with the reduced ?T in the 20-80°C cycle,the SAC thermal fatigue performance is equal to or better than that of identical SnPb soldered components. The encouraging SAC performance in the 20-80°C cycle tends to mitigate Pb free reliability concerns because the lower strain test conditions are closer to actual service conditions.

Since the European Union (EU) first published the Restriction on the use of Certain Hazardous Substances in electrical and electronic equipment directive (RoHS) in 2003,the document required updating per the methodologies within the EU’s legislative system. In December 2008,a draft of this review was publically available. Since then,several meetings have taken place and additional updates to the draft are available. There are expected changes,as well as unexpected changes,which are under discussion. In late 2010,the parties involved agreed on the majority of text for the recast. In early 2011,Parliament is expected to take an official vote to adopt the text as law. This paper will discuss these points; the conference presentation will discuss the most recent updates and status.

This paper will discuss the environmental and financial cost of operating both batch cleaners and small inline aqueous cleaners. It is not the goal of this paper to endorse one type of cleaner over the other type,but rather to provide end users with a balanced look at the pros and cons of both batch cleaners and small inline cleaners.
Both types of cleaners have been widely available for use in production facilities since the 1980’s. Choosing between a small inline and a batch cleaner can sometimes be an easy decision,but is most often a difficult dilemma without an obvious best choice. An objective look at the environmental and financial impact of both types of cleaners can help end users make a better decision for their specific applications.
This paper will compare the amounts of water,chemistry,and electricity used by both batch and inline cleaners. The environmental and financial impact of these measures will be discussed. Other factors such as floor space requirements,initial costs of the cleaners,and throughput capacity will also be examined.

From the first time we heard of new thin,low Dk,flex laminate material from DuPont we were excited. The material is what is now known,and commercially available,as DuPont’s Pyralux TK®. Working with DuPont on the development we called the material by a code name that we used so often amongst ourselves that now it is difficult to refer to it by its commercial name: Pyralux TK®. For the benefit of the reader,however,I will indulge herein by using the term “TK”®. And in the process hope to explain why we remain very excited about the opportunities that his new material provides the flexible circuit manufacturer.
When first approached by DuPont in the summer of 2009 about beta testing TK® we were most concerned about how the material would react through our standard flex circuit fabrication process. We assumed that DuPont had developed the material thoroughly and that the electrical properties promoted where accurate. But,as veteran flex circuit techies we live in fear of the four-letter word “Teflon”® - and the history that follows that material in flex circuit circles. So,we set out to develop a DOE (design of experiment) that would not only test the material against our standard process,but also against other common flex circuit laminates.