Lead-free assembly has introduced many challenges and non-conformances. One of the more troubling non-conformances is “Pad Cratering”. Pad cratering is when the copper pad completely separates from the laminate. The separation may occur outright at assembly or as the result of the field failure scenario detailed above. Pad cratering is the result of the technology exceeding the
capabilities of the materials.
To date there has been no solution to the problem of pad cratering,until now. Integral Technology has developed a solution that has the potential to minimize if not eliminate pad cratering. Integral’s solution is a material called Zeta Cap®. Zeta Cap® is a high performance polymer film that is capable of withstanding high temperatures. It has no woven fiber-glass thus making it CAF resistant.
It can be used in combination with current technology as an additional material layer between the outer layer foil and outer most dielectric. Zeta® has a high mechanical strength and flexibility compared to other lead-free compliant laminate materials.
Integral Technology’s Zeta® Lam,Zeta® Bond and Zeta® Cap (patents pending) are breakthrough materials for the PCB industry. The portfolio of Zeta products was spawned as a direct result of conversations with OEM’s and suppliers about how to expand product lines and solve problems. The original idea was to solve the problem of pad cratering (http://en.wikipedia.org/wiki/Pad_cratering). This silent and increasing threat to the electronics business can be eliminated by using Zeta® Cap on the PCB. The industry is enthusiastically embracing Zeta® Cap and its growth in the marketplace is a direct result of all stakeholders focusing on a solution to an emerging industry problem. Integral has evolved the product portfolio from Zeta® Cap alone to include Zeta® Lam and Zeta® Bond,giving Zeta customers’ new opportunities with High Density Interconnects. Zeta® Cap,Zeta® Lam,and Zeta® Bond are fiberglass free laminate and bonding materials that meet the needs of the next generation of electrical,mechanical and thermal demands due to the fact they are thin,high Tg,Low Dk and Low Df materials.

QFN’s offer advantages in reducing size and weight and have excellent thermal and electrical Conductivity related to the ground plane. QFN’s also present printing and assembly challenges including package floating during reflow and the very small stencil aperture area ratio’s resulting from the narrow and short pad design of the packages. This presentation will review stencil design aimed at improving the QFN printing and assembly process,QFN repair options will also be presented

The presentation will discuss the problems that many QFN users are dealing with by having flux trapped under the component that is still gooey and conductive and the effect on circuit performance of sensitive circuits. The reason why the QFN traps show much flux and why the need for a standoff to lift the component off the board surface using soldermask and via plugging. This comparison will be evaluated using localized C3 steam extractions and Ion Chromatography analysis of the two conditions.

Electronic assembly innovations drive more performance using highly dense interconnects. Assembly residues may increase the risk of premature failure or improper functionality. The challenge for OEMs is to quantify safe residue levels and gain insight into how residues impact long term reliability and functionality of hardware. To compound this problem,the question of “how clean is clean enough” is more challenging as conductors and circuit traces are increasingly narrower. Highly dense bottom termination components decrease conductor pitch,spacing and standoff heights. The problem is that current spacing trends can yield spacing between printed circuit traces as small as 2 mils. As electrical fields rise,contamination at these narrower traces becomes more problematic due to voltage swings,high frequencies,leakage currents,and high impedance. The objective of this research is to advance the understanding of chemical and electrical effects on reliability of high dense interconnects Phase 1 of the research focused on designing a new test vehicle to measure electrical responses to high voltage,rate of current change and frequency. Phase 2 studied the effects of high voltage effects on leakage currents in the presence of flux residue and environmental conditions under bottom termination components. Phase 3 will study the effects of frequency on leakage currents in the presence of flux residue and environmental conditions under bottom termination components.

Printing technologies provide a simple solution to build electronic circuits on low cost flexible substrates. Materials will play an important role for developing advanced printable technology. Advanced printing is a relatively new technology and needs more
characterization and optimization for practical applications. In the present paper,we examine the use of different materials in the area of
printing technology. A variety of printable nanomaterials for electronic packaging have been developed. This includes nano
capacitors and resistors used as embedded passives,nano laser materials,optical materials,etc. Materials can provide high
capacitance densities,ranging from 5 nF/inch2 to 25 nF/inch2,depending on composition,particle size and film thickness. The
electrical properties of capacitors fabricated from BaTiO3-epoxy nanocomposites showed a stable dielectric constant and low loss over a frequency range from 1MHz to 1000MHz. Reliability of the nanocomposites was ascertained by IR-reflow,thermal cycling,pressure cooker test (PCT),and solder shock. Change in capacitance after 3X IR-reflow and after 1000 cycles of deep thermal cycling (DTC) between -55oC and 125oC was within 5%. A variety of printable discrete resistors with different sheet resistances,ranging from ohm to Mohm,processed on large panels (19.5 inches x 24 inches) have been fabricated. Low resistivity materials,with volume resistivity in the range of 10-4 ohm-cm to 10-6 ohm-cm depending on composition,particle size,and particle loading can be used as conductive joints for high frequency and high density interconnect applications. The CITC (Current Induced Thermal Cycling) life at 245C is greater than 10 cycles and life at 220C is over 25 cycles to fail, which is at least equivalent to copper PTH (plated through hole) performance. Thermosetting polymers modified with ceramics or
organics can produce low k and low loss dielectrics.

• Summary of some new and existing technologies for printed electronics outside of traditional membrane switch manufacturing
• Discussion of requirements for understanding the technology of these applications in order to capitalize on them

Printed Electronics is generally defined as the patterning of electronic materials,in solution form,onto flexible substrates,omitting any use of the photolithography,etching,and plating steps commonly found within the Printed Circuit Board (PCB) industry. The origins of printed electronics go back to the 1960s,and close variants of several original applications and market segments remain active today. Through the 1980s and 1990s Printed Electronic applications based on Membrane Touch Switch and Electroluminescent lighting technologies became common,and the screen printed electronic materials used then have formed the building blocks for many of the current and emerging technologies and applications.
It has been only in recent years that the term Printed Electronics,with the inherent benefits of low cost manufacturing using additive processing,has captured the attention of a much wider audience. One consequence of this attention has been the rush to invest in new materials and patterning processes. While the results so far have generated some as yet unrealized market hype,there are many new and emerging applications that are just entering into production. But instead of requiring radical changes,many of these applications are using screen printed conductive materials that are fundamentally similar to those materials that have been used for over 30 years. We present here a review of both traditional and emerging applications
for Printed Electronics,with a focus on the printed functional materials. We also present several recent advances in the capabilities of conductive inks for various deposition methods.

– Define Printed Electronics
– Provide general market
information & Applications
– Provide performance
information on a wide variety
of thermoplastic films
– Provide processing
considerations for current
PE applications
– Provide incite into future
product developments

Printed Electronics is considered by many international technologists to be a platform for manufacturing innovation. Its rich portfolio of advanced multi-functional nano-designed materials,scalable ambient processes,and high volume manufacturing technologies lends itself to offer an opportunity for sustained manufacturing innovation. The success of introducing a new manufacturing technology is strongly dependent on the ability to achieve high final product yields at current or reduced cost. In the past,standards have been the critical vehicles to enable manufacturing success.
During the past few years the Printed Electronics Field has seen an increase in the number of companies attempting to scale-up their manufacturing processes for new product introduction. A key operations-related activity during this exercise is the establishment of a robust supply chain. Many of the printed electronics companies have negotiated unique quality conformance documents (i.e.,Certificates of Compliance) with each individual supply chain member. Also,these companies have made significant investments to develop internal standard operating procedures.
Historically,the adoption of standards has shown that it facilitates the growth of an emerging field and reduces the burden placed on individual companies to invest significant resources in the development of company specific compliance documentation. This paper provides an overview of the recently established IPC Printed Electronics Standards initiative.

There are few halogen free flame retardant laminates available and for those on the market currently,they are not considered mid loss and thermally stable. Theta circuit materials appear to be unique where they meet both these criteria along with other necessary requirements for good PCB fabrication and reliability. The difficulty is comparing materials to this unique material fairly. The appropriate comparisons were done here with materials that have a long proven record in the PCB industry and as a group these comparison materials have the attributes to verify thermal stability and mid loss performance. Through multiple lead-free solder reflows,288°C solder floats,eyebrow crack testing and other demanding high reliability tests not addressed in this paper,such as HATS,CAF,IST,liquid-to-liquid and moisture conditioning,it was found that this newly developed halogen free material is very
thermally stable. The electrical properties were found to be very good as well. The claim of a mid-loss material was verified from insertion loss testing compared to well-known low loss and high loss materials. Also,material dispersion of the dielectric constant was found to be very good and consistent over frequency which can enable a much more stable eye diagram for high speed digital applications.