Future handheld electronic products will be slimmer than today and deliver more functions,enabled by innovative electronics
packaging design using smaller components with greater I/Os assembled in higher density. As solder interconnects between
component and circuit board shorten,they also become weaker. This causes us greater concern on the survivability of such delicate electronic interconnects under normal handling impacts and serves motivation for formal study. This investigation will evaluate the influence of stencil printed solder volume on CVBGA97 electronic component lifetime in mechanical stress testing. A stencil aperture design to print a lower limit of solder paste volume has been thoroughly characterized as the first step towards determining the range of print volumes exhibiting the greatest influence on drop,bend,and die shear test performance. In this printing focused piece of work,print volume measurements were found varied across different circuit board pad designs with no change in aperture size. Highest paste volume transfer consistently occurred with solder mask defined pads. Stencil aperture and circuit board pad design variables are discussed in detail.

Stencil printing technology has come a long way since the early 80’s when SMT process gained importance in the electronics
packaging industry. In those early days,components were fairly large,making the board design and printing process relatively simple. The current trend in product miniaturization has led to smaller and more complex board designs. This has resulted into designs with maximum area utilization of the board space. It is not uncommon,especially for hand held devices,to find components only a few millimeters from the edge of the board. The board clamping systems used in the printing process have become a significant area of concern based on the current board design trend.
The primary function of a clamping system is to hold the board tightly in place to provide optimum gasketing during the printing process. There are various types of clamping systems available in the market,including top clamp,snuggers,flippers,and vacuum hold down. Top clamp and snuggers,two primary clamping systems,operate slightly different in providing the mechanism to hold the board. Top clamp,as the name implies,holds the board in place by applying a clamping system (a thin metal foil) on the top of the board. While the snugger works by tightly snugging the board in the Y direction without any foil on top of the board.
The current study is designed to investigate the effect of top clamp and Y-snugger on both a specially designed test stencil and production quality cell phone boards. This study will use a 3D Solder Paste Inspection (SPI) system to determine the variation in paste volume and height based on the location of the pad on the board. Various statistical techniques will be used to analyze the SPI data to determine the effectiveness of the clamping system.

This paper will present the results of a round robin study of sample combustion followed by ion chromatography (CIC) to measure the concentration of bromine and chlorine in electronic materials. The study involved ten volunteer testing labs,each analyzing four donated polymeric samples. Its primary objective was to gauge the within-lab and lab-to-lab reproducibility of the IC results obtained using the oxygen bomb and furnace sample combustion methods. The accuracy of sample combustion method was also investigated. Statistical analysis shows the within-lab reproducibility was better for the furnace method while the lab-to-lab reproducibility was better for the oxygen bomb method. In addition,both methods
showed good agreement in the results of samples with concentrations around the 1000 ppm threshold. However,neither
method proved accurate for very high concentrations of bromine and chlorine. These findings led to a group of recommendation for the analysis of Br and Cl using CIC.

The European REACH regulation (Regulation (EC) No 1907/2006) imposes requirements to declare and sometimes restrict the use of Substances of Very High Concern (SVHC). REACH affects all product types and forces the electronics industry to investigate substances that have not commonly been declared down the supply chain. On October 28,2008,the European Chemicals Agency (ECHA) published the initial Candidate list of 15 SVHC. Non-government Organizations (NGOs) are pushing for rapid introduction of additional SVHC and several EU member states are already preparing their next round of SVHC submissions to the European Chemical Agency. The short time frame in which SVHC are introduced creates a significant challenge for all actors in the electronics industry as many manufacturers will not know if presence of the substance is possible or likely in their products.
This paper summarizes the results of the first year of assessing electronic products and parts for SVHC. The testing involves
multiple manufacturers and a variety of product types. Assessment methods based on analytical testing,rule of thumb,and
engineering judgment are discussed. Some SVHC are considered to be commonly used in electronic parts and materials while other SVHC are unlikely constituents. We present a summary of results obtained from performing analytical testing for the Candidate list SVHC substances in various types of products and parts. The testing was performed in analytical test labs in North America,Asia,and Europe. A technical understanding of which parts and materials are likely to contain each SVHC and which parts and materials are not likely (or not possible) to contain an SVHC allows manufacturers to perform a risk assessment and focus their effort on the highest risk parts and SVHC.

Microvia technology has many advantages: it requires a smaller designed area,which saves the board size and weight,using less space,allowing for a smaller PCB,which can results in lower costs,and the microvia allows for better performance due to a shorter pathway. The practical definition of microvia technology is “high density printed circuit substrates that employ via diameters of under 10 mils [250 microns] in diameter.” With all the benefits of the microvia,cleaning issues are often overlooked. Bare board manufacturers have been effective in cleaning the larger vias; however,is the cleaning process as effective on the smaller vias? Failure analysis data suggests that etch residues from the build process are being left in the microvias causing corrosion and electromigration failures. If residues are in vias under components,the risk of contamination related failures increases. Ion chromatography results repeatedly reveal the importance of board and component cleanliness as an indicator of product performance. Manufacturers have historically used a standard rinse process with heated de-ionized water after etch to remove process residues. This process has been effective with traditional larger vias,but may no longer be an effective process with microvia technology. This paper will explore multiple via sizes,different approaches to cleaning,and what data shows may be the most viable option for producing good performing product.

As people become more concerned about the global outbreaks of various strains of influenza,more precautions are being taken with respect to personal hygiene. A common precaution involves the use of hand sanitizer solutions or similar germicidal agents. For manufacturers of electronic assemblies,this may mean a potential transfer of these solutions/agents to the surface of the assemblies as a contaminant material. Similarly,many production employees in the electronics industry deal with harsh chemicals,which often remove hand oils resulting in chapped or dry skin. The use of hand lotions may or may not be allowed,depending on the manufacturer,with a similar concern regarding transfer of unknown chemicals to the assembly surface. This paper is an examination of some typical hand sanitizers and hand lotions and their impact on high reliability electronic hardware.

With increasing adoption of lead-free PWB surface finishes,along with increasing product deployments in more corrosive
environments,the electronics industry is observing increased occurrences of corrosion-induced product failures. Particularly,
creep corrosion on immersion silver has been observed to cause product failures after very short service periods in G2 and
worse environments,in some cases less than one year. In our previous work (APEX 2009) [1],we demonstrated that creep
corrosion of ImAg can be correlated to the presence of certain types of surface contamination (for instance residues left
behind by organic acid fluxes). In this work,creep corrosion observed on OSP finished circuit boards will be reported. The
effect of post-reflow cleaning process on creep corrosion will be discussed. A laboratory MFG test will also be discussed that
replicates field creep corrosion. Comparison of creep corrosion susceptibility between OSP and ImAg PWB surface finishes
will also be made.

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- Production Processes
- Manual Production Line (2000)
- Fully Automated System (today)
- Cell Interconnection
- Encapsulation Materials
- Encapsulation Process
- Influence of Temperature
- Encapsulation Equipment
- Edge Trimming Equipment
- Setting J-Box
- Framing Equipment
- Testing Equipment

Some ball grid array suppliers are migrating their sphere alloys from SAC305 (3% Ag) or SAC405 (4% Ag) to alloys with lower silver contents. There are numerous perceived reliability benefits to this move,but process compatibility and thermal fatigue reliability have yet to be fully demonstrated.
The current study has been undertaken to characterize the influence of alloy type and reflow parameters on low-silver SAC
spheres assembled with backward and forward compatible pastes and reflow profiles. This study combines low-silver sphere materials with tin-lead and lead-free SAC305 solder pastes under varied reflow conditions. Solder joint formation and reliability are assessed to provide a basis for developing practical reflow processing guidelines and to assist in solder joint reliability assessments.
This is the fifth report in a series being published as results become available,and presents the preliminary results of the thermal cycling portion of the test program. Thermal cycling conditions include both 0 to 100oC and -40 to 125oC,with 10 minute dwell times.