Printable Materials and Devices for Electronic Packaging

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Printing technologies provide a simple solution to build electronic circuits on low cost flexible substrates. Materials will play important role for developing advanced printable technology. Advanced printing is relatively new technology and need more characterization and optimization for practical applications. In the present paper,we examine the use of different materials in the area
of printing technology. A variety of printable nanomaterials for electronic packaging have been developed. This includes nano capacitors and resistors as embedded passives,nano laser materials,optical materials,etc. Materials can provide high
capacitance densities,ranging from 5nF/inch2 to 25 nF/inch2,depending on composition,particle size and film thickness. The
electrical properties of capacitors fabricated from BaTiO3-epoxy nanocomposites showed a stable dielectric constant and low loss over a frequency range from 1MHz to 1000MHz. A variety of printable discrete resistors with different sheet resistances,ranging from ohm to Mohm,processed on large panels (19.5 inches x 24 inches) have been fabricated. Low resistivity materials,with volume resistivity in the range of 10-4 ohm-cm to 10-6 ohm-cm depending on composition,particle size,and loading can be used as conductive joints for high frequency and high density interconnect applications. Thermosetting polymers modified with ceramics or organics can produce low k and lower loss dielectrics. Reliability of the materials was ascertained by IR-reflow,thermal cycling,pressure cooker test (PCT),and solder shock. Change in capacitance after 3X IRreflow and after 1000 cycles of deep thermal cycling (DTC) between -55oC and 125oC was within 5%. Most of the materials in the test vehicle were stable after IR-reflow,PCT,and solder shock.

Author(s)
Rabindra N. Das,How T. Lin,Jianzhuang Huang,John M. Lauffer,Frank D. Egitto,Mark D. Poliks,Voya R. Markovich
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Embedded Packaging Technologies: Imbedding Components to Meet Form,Fit,and Function

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As the electronics industry moves toward smaller form and fit factors,advanced packaging technologies are needed to achieve these challenging design requirements. Current design problems are not driven by circuit design capabilities but by an inability to reliably package these circuits within the space constraints. Innovative packaging techniques are required in order to meet the increasing size,weight,power,and reliability requirements of this industry without sacrificing electrical,mechanical,or thermal performance.
Emerging technologies such as those imbedding components within organic substrates have proven capable of meeting and
exceeding these design objectives. Imbedded Component/Die Technology (IC/DT®) addresses these design challenges through imbedding both actives and passives into cavities within a multi-layer printed circuit board (PCB) to decrease the surface area required to implement the circuit design and increase the robustness of the overall assembly. A passive thermal management approach is implemented with an integrated thermal core imbedded within the multi-layer PCB to which high power components are mounted directly.
This paper discusses the design methodology,packaging processes,and technology demonstrations of prototypes packaged
using this technology. The various prototypes designed and manufactured using this technology will be presented.

Author(s)
Casey H. Cooper
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

PCB Assembly System Set-Up for Pop

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Traditional SMT assembly is a two dimensional process. Each component is placed on the same horizontal plane in different
X and Y locations. In Package on Package (PoP) assembly,components are placed on successively higher layers. Since
components are stacked on top of each other,traditional solder paste printing cannot be used. The typical SMT method to
print solder paste can only be used to print paste on a single horizontal plane. For PoP,the components that are placed on top
of existing components need to have flux or special dipping solder paste applied at the time of assembly. This paper will explore the challenges and solutions of PoP assembly for the SMT assembly system.

Author(s)
Gerry Padnos
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Selection of Dip Transfer Fluxes and Solder Pastes for PoP Assembly

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Consideration and selection of dip transfer flux and solder paste for PoP assembly are described,based on process consideration. The crucial properties vital for successful dip transfer include homogeneity,open time on flux/paste bed,volume and consistency of dip transferred material,open time after dip transfer before reflow,and solder joint formation. For each property,one or more practical test methods recommended are described. Overall,this work should provide the assembly house an easy way to select a flux or solder paste adequate for dip transfer PoP assembly applications.

Author(s)
Yan Liu,Pamela Fiacco,Derrick Herron,Ning-Cheng Lee
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Market Forecast and Applications for 3D Packaging using Package-on-Package (PoP)

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- 3D Manufacturing solutions: Flexible integration
- 3D/SiP Cost of Ownership
- Die vs. Package Stack Analysis
- Smartphone
- Package evolution
- Handheld Processor Roadmap
- PoP
- TMV
- Future Directions for 3D packaging

Author(s)
Jim Walker
Resource Type
Slide Show
Event
IPC APEX EXPO 2010

Photochemical Machining (PCM) for Cost-effective,Rapid Production

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Photochemical machining (PCM) is an excellent method for manufacturing both simple and complex parts in a wide range of
engineering materials. In the harsh economic climate facing manufacturing industry today,it is important to utilise costeffective
processes to produce high-quality parts rapidly for just-in-time delivery. This paper discusses the best methodologies to utilise PCM to its full extent as an extremely versatile process within the electronics,electrical and mechanical engineering disciplines.

Author(s)
David Allen
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Solder Paste Residue Corrosivity Assessment: Bono Test

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Lead free soldering with no clean solder pastes represent nowadays the most common process in electronic assembly. A solder paste is usually considered as no-clean if it passes all IPC J-STD-004 corrosion tests: copper mirror,copper panel corrosion test,Surface Insulation Resistance (SIR) and Elecrochemical Migration (ECM). Other SIR and ECM tests are described in Bellcore GR-78-CORE and JIS Z3197 standards.
Although SIR and ECM tests are recognized by all standards authorities to evaluate the solder paste residue corrosivity after reflow,a more selective method,the Bono test,has been developed and implemented in some French companies as a qualification criterion. It has been proven that compared to common corrosion tests,the Bono test better differentiates the nature of solder paste residues.

Author(s)
Céline Puechagut,Anne-Marie Laügt,Emmanuelle Guéné,Richard Anisko
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Effects of Solder Mask on Electrochemical Migration of Tin-Lead and Lead-Free Boards

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Electrochemical migration (ECM) is the growth of conductive metal filaments on a printed circuit board (PCB) through an electrolyte solution under a DC voltage bias. ECM can cause a reduction in surface insulation resistance (SIR) between adjacent conductors,generate a path of leakage current,and lead to intermittent or catastrophic circuit failures.
Solder mask has been widely used on printed circuit boards to define wettable surfaces,reduce moisture access,control outer layer impedance,and improve corrosion resistance. The mechanical and thermal properties of solder mask have been widely reported,but systematic studies of their influence on ECM have been few. This paper presents the results of temperature-humidity-bias (THB) testing of more than 1000 hours duration at 40V,65°C,and 88% relative humidity for comparative evaluation of ECM on circuit boards with and without a solder mask. The boards were HASL finished and wave soldered using a no-clean,low solids flux. Besides primarily assessing the effects of using a solder mask on ECM,the effects of solder alloy composition (eutectic SnPb versus Sn-3.0Ag-0.5Cu) were also investigated. In situ monitoring of SIR was performed throughout these tests. Optical microscopy and scanning electron microscopy were employed to examine the correlation between the physical attributes of dendrites and the measured SIR,as well as to evaluate the effects of solder mask and solder alloy on ECM. Ion chromatography (IC) was conducted to measure contaminant levels on the surface of the PCBs. Elemental mapping by energy dispersive X-ray spectroscopy was employed to identify the migrating species and their distributions and morphologies within the dendrites. As expected,the use of a solder mask resulted in higher SIR,but a dramatic difference was observed in its effect on dendritic growth and characteristic life.

Author(s)
Xiaofei He,Michael H. Azarian,Michael G. Pecht
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010