Traceability and process control are no longer requirements reserved for manufacturers in regulatory or specific market segments. Today,all manufacturers who aspire to achieve or to maintain a ‘world class’ status must deliver some degree of traceability. The PCB assembly industry lacked a common language regarding the nature of traceability or its levels. Nor has there been a means to benchmark such capability or to communicate its nature to customers or regulatory agencies in a common manner.
Recently,we,in collaboration with a leading supplier of dummy components and process testing kits,partnered together to offer an innovative kit designed to validate and benchmark the entire manufacturing process and provide the potential for rich product and process traceability detail. This new kit provides the physical materials and the procedural guide to determine a factory’s traceability and control capability,and then rate the results in a formalized matrix. These ratings can be used to demonstrate capabilities,communicate to customers or auditors,or to provide a start point for manufacturers to improve their capabilities and track progress along the way.
This materials kit and ratings methodology aids manufacturers the demand-side of the market in the following ways:
- Benchmark Traceability and Control
Test and validate three key elements of traceability; exercising quality manufacturing practices control mechanisms to assure process execution of these practices is proper even under high-change conditions,and the resultant reporting scope and depth that serve as evidence of the practices and controls performed. This approach of validating process control and visibility yields a comprehensive assessment of a factory’s capabilities.
- Communicate Capabilities
Using both the elements of the methodology and the metrics derived from an audit when it is applied,manufacturers have the means to convey to their customers or auditors their true traceability capability. In the past,this has been impossible without a common rating system or even a generalized agreement on the maximum range of what traceability entails. The purpose of this kit is to establish a common rating on the scale from simple traceability to world class capabilities. The scale can then be used to communicate a factory’s capabilities in a uniform manner to management and external parties that require this information.
- Improve What is Measured
The rating scale aids manufacturers who are continuously looking for ways to improve their factory operations. Through uniformed measurements,a road map can be developed to advance a plant’s manufacturing processes,controls,and traceability. By measuring a factory’s capabilities today,this kit aids in defining path to the future.
- Technical Basis
Aegis’ methods of rating traceability have been concurrently developed with,and adopted by,many of the leading manufacturers in the industry. The collective challenges and experiences of a customer base exceeding 1000 corporations on five continents have contributed to the scope of the methodology. Users of the method and kit consequently benefit from over seven years of definition and usage in factories all over the world to rate systems and processes against this scale.

Prisma is a PCB-Engineering software developed by DYCONEX AG,Switzerland (manufacturer of PCBs). Compared to existing solutions on the market it allows for broad standardization of the process flow while not imposing any restrictions on the design. It is a platform to specify the build-up,materials and the complete work instructions for PCBs. Engineers transform the customer data into full manufacturing papers by means of Prisma. The software has been developed for company internal use only and is (currently) not being sold. One of the key features of Prisma is its freely definable library of process modules. These modules always reflect the current capabilities and process settings. Existing products can be compared to the current state of the module library und be updated in a semi-automatic way. Build-ups and operation plans are presented in an interactive graphical screen that allows the engineer to build the product and incorporate changes in an easy and intuitive way without the need to take care of the detailed process specifications. In addition to formatted easy readable work instructions,Prisma returns schedule- and cost relevant operation times for each process allowing a quick and precise cost estimate for quotations. The software includes an automatic revision management complying with the high traceability requirements of customers working in the medical and military sector. Access to data is restricted by user login. The software is based on SQL Server and .NET technology and includes an interface to the ERP-systems (Enterprise Resource Planning) Abacus and Microsoft Dynamics AX. Live access to the material,product and customer database kept in the ERP-system guarantee always current data. Production planning and costing are accomplished in the ERP-system based on data provided by Prisma.
Introduction
Printed Circuit Boards are manufactured in a long chain of processes,each of which can have several parameter settings. A typical operation plan for a PCB consists of 50 to 300 single processes. Most processes are critical,meaning that they can not be omitted without leading to a non functional or lower quality PCB. A certain design does not lead to a unique process chain however. There always exist optional processes or groups of processes as well as alternative process blocks. Which of these alternatives is chosen may influence yield,costs and quality of the product. The requested quality level - e.g. the extents of AOI and visual inspections being planned - is primarily given by the customer (specification,IPC level) and the standards of PCB manufacturer (defining that certain tests are done even if not requested by the customer). Optimization of yield and costs is an essential key in gaining competitive advantage,allowing lower target prices. Raising the yield of a product from 80% to 90% reduces its costs by 1/9. If this can be achieved by simplifying the operation plan,one can easily gain significant cost reduction without implementing new technologies or changing the build-up. Optimization itself has its costs,since it usually involves engineering capacity. Our company manufactures around a hundred different PCBs at a time making it next to impossible to optimize each of these products. The idea here is to automate the optimization process,or better still to start with a near optimum design and apply optimizations of one product on other products. For PCB shops focusing on a certain type of products (like rigid multilayer only,or 2 layer flex only) this optimization needs less engineering capacity per product. Prisma is designed for a manufacturer with a wide range of products (rigid,rigid-flex and flex boards) with a broad range of materials (polyimide,FR-4,LCP,molybdenum etc.) in a high-wage region (Switzerland).

To select an optimal test strategy,good knowledge of defect levels and test effectiveness are two very important factors to include. In 1999 an industry defect level study was completed and was often referred to as the “One Billion Solder Joint Study”. The content of this study was presented in several papers and articles [1],[2]. Other industry defect studies have also been done [3],[4] A study was performed in 2007 with data from 14 different companies from Asia,Europe,and Americas and with data from around 3.7 Billion solder joints inspected. This paper will present result from this updated study.
Test Effectiveness has also been presented in several papers [5],[6]. A test effectiveness study is a way to evaluate a test method’s effectiveness to detect defects and is probably the most objective way to measure these very important characteristics. This paper contains updated data from this type of study. Effectiveness from ICT (In-circuit Test),AXI (Automatic X-ray Inspection) and combined results from AOI (Automatic Optical Inspection),FT (Functional Test) and MVI (Manual Visual Inspection) will be presented.

It is understood that the solder paste printing process presents far more opportunities for defects than any of the other individual Surface Mount Technology (SMT) Manufacturing Processes. In addition,transition to lead free solder paste and use of miniature components,has increased the complexity of the printing process. It has been proven that the lead free solder pastes do not spread or “wet” as well as tin lead solder pastes. In general a more accurate printing process is required in a lead free process. This has pushed the manufacturer to implement some type of post-print inspection.
The impact on the overall process must be considered when implementing in-line solutions for inspection. Factors that should be considered are,accuracy and repeatability,capability to evaluate all three Regions of Interests (ROI),cost of implementation,and speed. The three regions of interest (ROI) include the solder paste on the printed circuit board pad (both 2D and three 3D can be considered here),the region between the printed circuit board pads,and the region between the stencil apertures. Budget considerations may drive customers to consider in-line sampling techniques versus in-line 100% inspection. Sampling options today include SPI (Solder Paste Inspection) systems,both 2D or 3D,or within-printer 2D inspection.
This paper describes correlation between a true 2D area measurement (e.g. printer) and a height map generated area from a SPI system. In addition,this paper will explore the correlation between area/volume measurements and bridge detection between 2D/3D techniques. The ultimate goal is to arm the process engineers with information that can be used to make decision that will impact defects,cost,throughput and Return On Investment.

Rarely do PCB manufacturers have the resources for purchasing an inspection machine for every stage of the manufacturing process. Typically,therefore,they have to decide whether to deploy AOI prior to the reflow oven ("in-process") or after it ("end of line"). An argument can be made for both cases. On the one hand,a high-performing post-reflow AOI machine has the capability of inspecting all fault types (solder related faults and component level faults) at the end of the line. At this point all boards can be manually fixed and some coarse level,time-delayed information can be fed back to the in-process side. On the other hand,one pays the price for finding faults at such a late stage in the process. By the time the fault has been found,multiple boards have been built - all possibly with the same faults. Thus,the in-process side of the house would suggest that AOI be moved back into the process to find faults as the boards are actually being built. Faults can be fixed immediately and process information can be fed back in a timely manner to stop faults from occurring and to prevent further faults. The theoretical economic argument is strong that earlier detection leads to reduced re-work and scrap which increases the profit margin. The in-process argument suggests that if the paste is correctly applied and the parts are correctly placed,then any solder related defects will be small if not non-existent at the end of the line. The end of line camp counters that some defects will be created by the oven and,thus,will be missed by in-process inspection. This debate of whether to deploy pre-reflow vs. post-reflow can only be settled by real empirical data. In this paper we present the results of a study at a manufacturing site in the US which contrasts using post-place inspection to find and correct defects and also to perform process control vs. using a post-reflow inspection system to find defects at the end of the line. We will quantify and contrast the benefits and drawbacks of each type of inspection alone and will also discuss any synergies between the two inspection strategies.

Fine solder powder paste applications continue to grow as a cost effective solution to many semiconductor packaging needs. Applications for solder paste continue to evolve from the standard SMT market to the semiconductor backend. This paper describes capability and process details for wafer bumping,substrate bumping,Solder on Pad,BGA ball attach and System in Package applications. For wafer bumping,quantitative bump height data,demonstrated print process,stencil design and powder size effects are discussed. For Solder on Pad,stencil design and pad finish effects are discovered. For BGA balls attach,the ability to reduce final package coplanarity is disclosed using solder paste. For System in Package,guidelines for paste printing 01005 chips are discussed. Quantitative data on material printability,dip-ability and pin transfer efficiency are covered in detail. Guidelines for suitable powder sizes for various applications are provided. Powder types from 5 through 8 are described and compared for various application processes as well as stencil and pin transfer tool designs.

As small surface-mount components such as 0201 and 01005 packages have entered volume assembly,manufacturers are observing increased instances of poor solder coalescence during reflow. The root cause is the change in oxidation behavior at very low volumes of deposited paste. A solution is required,both to restore a high-quality appearance to solder joints and to maintain customer confidence. Comprehensive analysis of factors including material selection,print process settings,reflow profile,and factory-floor practices highlights a number of measures that engineers may apply to solve this issue cost-effectively without impairing satisfactory reflow of other components on the board.

As the frontiers of feature size and interspace between devices become ever challenging,we as an industry have to start revaluating the performance of the toolsets that are used in the SMT arena. The days have gone where a tolerance of tens of microns was acceptable; this has now moved into the sub 10-micron domain. This issue is none more critical than within the print process,it is this pre placement tool-set that is most sensitive to the miniaturisation program running through the industry.
When we take a step back and reflect on what is required from a printing process at this new level of miniaturisation,we can quickly understand that the solder paste volumes required are crossing into semicon territory. Indeed it is clearly possible to count the solder particles that makes up a 0.3mm C.S.P deposit,the scale is so small. It is therefore paramount the composition of this pre placement tool-set is fully realised.
It is the intention of this paper to break down the elements of a print platform into its major mechanical and process subsections. Within the mechanical section,the elements investigated will be co planarity of rail systems and tooling nest; whereas with the process section the elements investigated will be the composition of the squeegee assembly. Each element will be fully explored using analytical methods to comprehend the cause and effects. The separate modules will then be combined to enable an aggregate picture of the process and thus allow a conclusion of which component parts are the most critical and to what level of accuracy is required for the SMT challenges ahead.

The growth of portable wireless products and related consumer electronics is fueling a major outsourcing effort towards Asia. Most OEM (original equipment manufacturers) are partnering with CMs (contract manufacturers) in Asia to outsource key operations such as board design,fabrication,SMT assembly and procurement to maintain profitability and competitive edge.
Outsourcing can offer OEMs significant advantages in maintaining a healthy bottom line,reduced capital risks,increased access to current technologies and reduced time to market. Outsourcing also allows CMs and EMS (Electronic Manufacturing Services) to subcontract the work that does not fit their core competencies,so they can make diversified product.
Outsourcing with strategic partners is more important for OEMs for the lead free migration as this is bringing many challenges for the PCB and SMT industry with new high Tg (Glass transition temperature) laminates,new lead free alloys,rework processes,moisture sensitivity etc. This requires careful evaluation of new laminate materials,balancing component layout and optimization of reflow profiles to minimize damage to PWBs. This is critical for thin PWBs (less than 0.1 mm) boards used in cell phones and other portable products that use build up microvia technologies.
The handheld wireless product market place demands products that are small,thin,low-cost and lightweight and improved user interfaces. In addition,the convergence of handheld wireless phones with palmtop computers and Internet appliances is accelerating the need for functional circuits designed with miniaturized,low-cost technology.
Outsourced PWBs from Asia are becoming more and more of a reality for OEMs involved in high volume manufacturing. Proper evaluation and qualification of these facilities is critical for assembly reliability.
This paper reviews qualification efforts from HDI (High Density Interconnect)[1} and ALIVH (Any layer Inner Via Hole) PWBs [2} procured from Asian fabs in China,Taiwan,Korea and Japan. Quality systems audit,PWB evaluation,acceptance criteria,DPPM (Defective Parts Per Million) Review and reliability testing will be presented. Additionally,ways and strategies for overcoming cultural differences,communication,conflict resolution,and building supplier/ customer relationship will be reviewed.

This paper will compare the current capabilities of raw material suppliers to the PWB industry to those same capabilities 10 and 20 years ago. Key raw materials such as resin,glass fabric,copper foil,laminates and prepregs will be discussed. Supplier profitability,consolidation and globalization have all had some influence on these changes. Globalization of the supply base and changes in telecommunications has also driven the trend.
Market segments especially affected by the migration of intellectual investment to Asia are computers,telecommunications and consumer electronics. More recently automotive electronics,internet infrastructure,test equipment and even some military electronics have found the need to search outside of the US for advanced raw materials. High Speed materials and RF products have traditionally been the most innovative and performance driven materials. Current trends have pushed even those materials into the realm of cost control and reduction.
The paper will also discuss how these changes affect the long-term viability of the PWB industry in North America. What markets can prosper under these conditions and what markets have suffered. Current and future business plans and investments of these key suppliers have shifted the US from a leader to follower in all but the most specialized raw materials. The shift from innovation driven business models to efficiency driven models in the supply base is also a major reason for the shift to lower cost manufacturing.
Is this trend going to continue unabated is it irreversible or is there a place for companies with manufacturing in North America to survive? This paper will also describe how some suppliers are restructuring to deal with these changes while continuing operations in North America.