As the use of lead-free alloys has increased in electronic assemblies,much work has been done to develop Design for Manufacturability (DFM) guidelines for the new materials. However,there are still some challenges remaining with wave solder,which is a complex process with many interacting factors. One such challenge is achieving good Pin Through Hole (PTH) barrel fill on thicker PCBs,particularly for power/ground pins connected to multiple plane layers. One important factor in the selective wave solder process is the size of the selective pallet opening around the PTH pins. It has been observed that larger pallet openings generally provide better barrel fill than smaller ones,but further research is needed to determine the recommended pallet opening for more thermally challenging product designs. The recommended pallet opening can then be used to determine DFM guidelines for the component keep out from the PTH pins on the solder side of the board.
This paper presents the outcome of a study done with a thick,thermally challenging test vehicle wave soldered using a wide range of selective pallet opening sizes. The test vehicle is 3.05mm (0.120”) thick with twenty copper layers,including ten plane layers,and is populated with several PTH component types. Other design variables include pin to hole clearance,and quantity of plane layers connected to each pin. The PCBs were assembled with a Pb-free alloy (Sn-Ag-Cu) and also SnPb as a baseline. In the first part of the investigation,a Design of Experiment was performed to optimize the wave solder process parameters and in the second phase,the optimized process parameters were held constant to focus on varying the pallet opening size only. The results for the various pallet opening sizes and their interaction with the other design factors will be discussed.

Bottom terminated component (BTC) assembly has rapidly increased in recent years. This type of package is attractive due to its low cost and good functional performance (improved signal speeds and good thermal performance). However,it creates many challenges to the assembly process and post assembly inspection.
This paper discusses the design,assembly process and inspection challenges of bottom terminated components. The study considers many factors,including design variables (solder mask defined pad,non solder mask defined pad,mixed pad design,different via design,thermal connection,orientation,etc.),process variables (stencil design,reflow profile,reflow atmosphere,etc.),board surface finish variables (OSP,I-Ag,ENIG) and fabrication variables (solder mask thickness and type).
Keywords: bottom terminated component (BTC),quad flat no lead (QFN) package,land grid array (LGA) package,micro lead-frame (MLF) package,void,solder,SMT,lead-free.

The electronics industry has mainly adopted the higher melting point Sn3Ag0.5Cu solder alloys for lead-free reflow soldering applications. For applications where temperature sensitive components and boards are used this has created a need to develop low melting point lead-free alloy solder pastes. Tin-bismuth and tin-bismuth-silver containing alloys were used to address the temperature issue with development done on Sn58Bi,Sn57.6Bi0.4Ag,Sn57Bi1Ag lead-free solder alloy pastes. Investigations included paste printing studies,reflow and wetting analysis on different substrates and board surface finishes and head-in-pillow paste performance in addition to paste-in-hole reflow tests. Voiding was also investigated on tin-bismuth and tin-bismuth-silver versus Sn3Ag0.5Cu soldered QFN/MLF/BTC components. Mechanical bond strength testing was also done comparing Sn58Bi,Sn37Pb and Sn3Ag0.5Cu soldered components. The results of the work are reported.

Although lead-free soldering has been main stream in the industry since 2006,with the replacement of eutectic SnPb system by the Sn/Ag/Cu system,the development of drop-in lead-free alternatives for high melting high lead solder alloys is still far from mature. The Bi/Ag alloy exhibits acceptable bulk strength,but very poor ductility and wetting. Therefore,it is not acceptable as an option. In this current work,a mixed-powder Bi/Ag/X solder paste system has been developed as a viable alternative high temperature lead free solder. The metal powder in the paste is composed of a high-melting first alloy powder as a majority and the additive powder as a minority. The additive contains a reactive element to react with various metallization surface finishes. The additive will melt and react on the parts before or together with the melting of the majority solder. The reactive element in the additive is designed to be converted completely into IMCs during the reflow process,resulting in a high-melting solder joint. In the mixed-powder paste system,a melting temperature above 260°C was verified by both DSC and TMA data. The mixed-powder solders show a significantly improved wetting comparing to Bi11Ag. The voiding and TCT performance are comparable with high-lead solders. The IMC layer thickness of the mixed-powder system is insensitive toward thermal aging at 175°C while the high-lead solders do show a considerable increase. The fine and well-dispersed Ag particles in the joint,together with the controlled IMC thickness,are attributed for the reliability improvement.

What We Achieved: Current Proposed OTC Model Rule Modifications
• Vapor degreasing exempted from 25 g/L limit
– NESHAP-like equipment & controls
• 150 g/L VOC maximum for electronics assemblies & process adjuncts
– Why is 150 g/L important?
• 150 g/L is workable for defluxing
• 25 g/L is impractical

We describe the design of a novel test structure,to which we have given the name “HD”,that will facilitate the evaluation of blind and buried microvias in printed circuit boards,in comparison with existing,standard test coupons. HD will consume less board space than and be,at least in the case of blind vias,more representative of realistic board structures than standard coupons.

Round Robin Reliability Evaluation “Revival” Proposal
1.TR-579
2.IST( IPC-9151/TM 2.6.26) 3.HATS (IPC-9151)
4.CITC(EIT) 5.TS(TM650-2.6.7.2B,MIL31032/1C) 6. Application(Odometer )

As we progress in the 21st century,electronics manufacturing will need more and more precision. Parts will get more complex since more components have to be assembled in smaller spaces. Circuit boards and other electronic assemblies will become more densely populated; spacings between components will be shorter. This will require precision manufacturing and efficient cleaning during and post manufacturing. In addition,with population and technology progressing,larger amount of greenhouse gases will be emitted resulting in higher global warming. Intense research effort is going on to develop new generation of chemicals to address both cleaning and global warming issues. Low global warming solutions in refrigeration and as insulating agents are already in the marketplace. This paper will detail the development of a new very low global warming potential environmentally friendly non-flammable solvent with excellent cleaning abilities. Environmental properties,cleaning efficacies,stability in various conditions,and compatibility with plastics,elastomers,and metals of the solvent will also be described in this paper.

For many years there has been a huge disconnect between the engineers that design the assembly and the chemists responsible for developing the assembly materials. In short,engineers and chemists don’t speak the same language.
•In today’s HDI environment,this disconnect in language can cause more issues than it solves. The challenges of cleaning the smaller pitched components used in the HDI World means that the two disciplines need to be married together to better understand how to overcome these challenge.

Boundary-scan (1149.1) technology was originally developed to provide a far easier method to perform digital DC testing to detect intra-IC interconnect assembly faults,such as solder shorts and opens. Today’s advanced IC technology now includes high-speed differential interfaces that include AC or DC coupling components loaded on the printed circuit assembly. Simple stuck-at-high/low test methods are not sufficient to detect all assembly fault conditions,which includes shorts,opens and missing components. Improved diagnostics requires detailed circuit analysis,predictive assembly fault simulation and more complex testing to isolate and accurately detect all possible assembly faults.
Several cases will be presented to illustrate how usage of circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information. Special attention will be paid to the increasing usage of high-speed differential logic interfaces and their associated discrete components and connectors,which increasingly have no probing access and then traditional incircuit test cannot be accomplished.
The material will also include a discussion of future challenges and their potential impact on diagnosis of assembly faults. Many in the industry are very much aware of the decline in probing access and are wisely skeptical of claims that providing a function test will provide an accurate and useful diagnostic indication upon failure. This material is intended to further the development and evaluation of solutions that not only detect,but usefully diagnose assembly faults….which clearly are not disappearing any time soon!