With the rapid development of the information industry,increasing attention is being paid to the dielectric performance of base materials including copper-clad laminates (CCL) and prepregs. In addition to the increasingly high performance requirements of CCL’s,the present global attention to less toxic products is leading to an increase in the use of halogen-free flame retardants in electronics. The main flame retardants used in halogen-free CCL’s are phosphorus-containing phenolic resins,phosphonitriles,phosphorus containing epoxy resins,and several additive type compounds. Flame retardant additives like phosphates have low or no reactivity with epoxy resins,which typically results in lower glass transition temperature (Tg),higher moisture absorption,reduced dielectric performance and lower heat resistance. This paper introduces a new phosphonate oligomer which can be used as a reactive flame retardant in epoxy based resin systems. Suitable conditions for the complete reaction between the phosphonate oligomer and epoxy resin are described and the resulting halogen-free laminates with improved properties such as low Df,low coefficient of thermal expansion (CTE),high peel strength,and good toughness are presented. The significance of this paper is not only to introduce a new halogen-free,mid-Tg,low loss CCL,but also to highlight a novel kind of halogen free reactive flame retardant for CCL. Comparison performance data to other commercial halogen-free base materials will be presented.

The miniaturization trend is driving industry to adopting low standoff components or components in cavity. The cost reduction pressure is pushing telecommunication industry to combine assembly of components and electromagnetic shield in one single reflow process. As a result,the flux outgassing/drying is getting very difficult for devices due to poor venting channel. This resulted in insufficiently dried/burnt-off flux residue. For a properly formulated flux,the remaining flux activity posed no issue in a dried flux residue for no-clean process. However,when venting channel is blocked,not only solvents remain,but also activators could not be burnt off. The presence of solvents allows mobility of active ingredients and the associated corrosion,thus poses a major threat to the reliability. In this work,a new halogen-free no-clean SnAgCu solder paste,Paste F,has been developed. This solder paste exhibited SIR value above the IPC spec 100 MO without any dendrite formation,even with a wet flux residue on the comb pattern. The wet flux residue was caused by covering the comb pattern with 10 mm × 10 mm glass slide during reflow and SIR testing in order to mimic the poorly vented low standoff components. The Paste F also showed very good SMT assembly performance,including voiding of QFN and HIP resistance. The wetting ability of Paste F was very good under nitrogen. For air reflow,Paste F wetted well on all surface finishes,and is better than paste C which is widely accepted by industry for air reflow process. The above good performance on both non-corrosivity with wet flux residue and robust SMT process can only be accomplished through a breakthrough in flux technology.

Controlled humidity and temperature controlled surface insulation resistance (SIR) measurements of flux covered test vehicles,subject to a direct current (D.C.) bias voltage are recognized by a number of global standards organizations as the preferred method to determine if no clean solder paste and wave soldering flux residues are suitable for reliable electronic assemblies. The Association Connecting Electronics Industries (IPC),Japanese Industry Standard (JIS),Deutsches Institut fur Normung (DIN) and International Electrical Commission (IEC) all have industry reviewed standards using similar variations of this measurement. Ionic contamination testing is recognized by the IPC as a standard for evaluating the cleanliness of assemblies that have subjected to a cleaning process. IPC J-STD001F standard calls for a cleanliness level of < 1.56 µg/cm² NaCl equivalent after the cleaning processes. Historically,this threshold originated from the cleanliness specifications of military and aerospace original equipment manufacturers (OEMs). These applications used rosin-based wave soldering fluxes,such as RMAs,and cleaned with now presently banned fluorocarbon solvents. Many of these applications have subsequently implemented water soluble soldering processes. Several automotive and consumer electronic OEMs still use this standard,to qualifying assemblies built with no-clean materials using mixed SMT and PTH assembly technologies. IPC-TM-650 Method 2.3.25 contains standard test methods for extracting contaminants from circuit boards using heated isopropanol (IPA) / water mixtures. Test method 2.3.25 is commonly referred to as the ROSE (Resistivity of Solvent Extract) test. Previous work [1,2] has shown poor correlation between the presence of extractable,corrosive weak organic acids and results from IPC-TM-650 2.3.25 test results,partially due to the lack of solubility of materials found in no-clean fluxes,and the higher SIR values imparted by rosins and resins in modern no-clean soldering materials. This study will compare the results from testing two solder pastes using the IPC-J-STD-004B,IPC TM-650 2.6.3.7 surface insulation resistance test,and IPC TM-650 2.3.25 in an attempt to investigate the correlation of ROSE methods as predictors of electronic assembly electrical reliability.

The selection of a liquid flux for use in wave soldering operations is extremely critical to both the manufacturing assembly process and the long term reliability of electronic assemblies. As in the case of VOC-free fluxes,suppliers have developed products that minimize their impact on the environment and meet IPC-JSTD004 Revision A requirements. Just over 4 years ago Revision B was released[1]with significant changes to the Surface Insulation Resistance testing including thermal profile,humidity targets,bias voltages,and measuring frequency requirements. These changes along with tighter halide limits have significantly restricted the VOC-free flux offerings,due to concerns of reliability test failures. Though harsh environments may have seen improvements in the field of reliability,correlation to field failure rate improvements has not been seen on typical environments since the option of Revision B release. Smaller flux formulators are not always aware of the changes nor have re-classified their products. Testing has uncovered numerous VOC-Free products,which do not meet stated specifications. Even for fluxes claiming to pass the current standard,the lack of adequate method detail on how to execute the test and reporting of parameters used,introduces variation in results and interpretational errors. In order to meet the IPC J-STD-004 standard Revision B requirements and design materials that can meet the thermal challenges of today’s products,most liquid flux formulators increased or re-introduced rosin in the formulations. As a result,moving back to the use of alcohol fluxes is the primary option. This transition back to VOC containing materials conflicts with the majority of the environmental initiatives within manufacturing. This paper details the challenges to be encountered by comparing results provided by flux manufacturers to that obtained in-house during verification testing. Comparison will also be made between laboratory testing and production results. Gaps and opportunities will be presented in the industry’s current approach to flux development and selection.

In this rapidly moving electronics market,fast to market with new products is what separates top performing companies from average companies. A survey conducted by Arthur D. Little (ADL) [1] revealed that “New-Product Development (NPD) productivity in atop performing company is five times what it is in the average company. The top performer gets five times as much new product output for the same investment.” What do they know that the rest of us do not? One winning factor is the use of the Robert Cooper process [2]. Since its introduction in the early 1980’s,it has gone through many modifications to make it more lean and effective for today’s business climate. Many larger organizations already practice this method. However,for small to medium size organizations,a dedicated New Product Development (NPD) process may appear to be a daunting task. This is due to the perception of the complexity of the Stage Gate process. This paper will present a Lean Six Sigma approach to “right sizing” the Stage Gate process to be efficient,practical,and easy to manage. Various tools of Stage Gate,along with proven best practice,will be covered. In addition,a reduced Stage Gate model will be discussed for simple,low risk projects.

Sustaining the results of any continuous improvement effort can be challenging. With Lean improvement,constant monitoring,coaching and tweaking is often required to keep the "old ways" from creeping back into the process. With Six Sigma process improvement,the challenge is to create ownership in the improved process; without this ownership the changes often disappear overnight. Two companies,both contract electronic manufacturers,have adopted methodology from both Lean and Six Sigma that has proven successful by placing the ownership in the workforce's hands and demonstrating results-based support from leadership. Both companies were searching for ways to improve quality and customer satisfaction when they began utilizing Lean Manufacturing concepts and then quickly integrated Six Sigma concepts to strengthen their outcomes. As Lean began to produce results,it was apparent that there needed to be metrics in place to sustain the results and allow employees to manage the processes through the concepts of an empowered workforce. Finding that the traditional metrics that had been used for years were not sustaining the gains or providing adequate guidance to employees,these two companies turned to a fundamental Six Sigma Green Belt measurement tool and the concept of “Measurements with Meaning”. Not needing to overwhelm their employees,Process Behavior Chart (PBC); AKA control chart software,was introduced to the manufacturing floor. Being able to measure the way processes normally behave and investigating signals to find root cause greatly enhanced daily production results,and gave the employees the ability and authority to identify and act upon problems as they occurred. Relying on the concepts of Measurements with meaning to help identify the metrics necessary for success,fully engaged work forces evolved at both companies very quickly. Employees had no problem identifying what they valued both within their processes and as a company,and they wanted a way to show management that they were doing everything possible to succeed. Instead of "chasing" every minor change in productivity,each work center simply focused on total parts produced and work orders "left on deck" (due but not complete at end of day). All signals which now appear on the Process Behavior Charts are investigated initially for assignable (special) cause. Focusing on the right issues and items,through employee ownership of the processes,has created significant and lasting results for both companies.

In the high temperatures during board assembly reflow soldering,the base material becomes soft and there is a severe risk for permanent warpage. There are many parameters that could affect board warpage during reflow soldering. The board width,board thickness,layer count,amount of copper,distribution of copper,glass fiber weave style,milling,type of base material,symmetry in all directions,component population and component weight are,among others,important factors. It is very difficult for the board designers to decide when an area on the secondary side should be left free of components to give place for board support during the reflow soldering process in order to mitigate board warpage. An evaluation was therefore performed that aimed at formulating an easy-to-use rule for this purpose.

In the high temperatures during board assembly reflow soldering,the base material becomes soft and there is a severe risk for permanent warpage. There are many parameters that could affect board warpage during reflow soldering. The board width,board thickness,layer count,amount of copper,distribution of copper,glass fiber weave style,milling,type of base material,symmetry in all directions,component population and component weight are,among others,important factors. It is very difficult for the board designers to decide when an area on the secondary side should be left free of components to give place for board support during the reflow soldering process in order to mitigate board warpage. An evaluation was therefore performed that aimed at formulating an easy-to-use rule for this purpose.

The electronics markets place widely varying demands on products,thus necessitating a great deal of complexity with regard to board design and connector technology. A nearly inexhaustible multiplicity of electronic components is available to this end for implementing the respective product concepts. There is of course no universal soldering process which fulfills the requirements of all of these different products at the same time. However,the capability demonstrator board has provided us with the opportunity of exploring the limits of what is feasible and what is not,additionally pointing out the difficulties associated with the reflow soldering process of complex PCBs. In the following pages we will discuss target goals for reflow soldering derived from generally recognized rules and standards,as well as the temperature-time curves (reflow profiles) obtained with the demonstrator board. Our examinations focused primarily on convection reflow soldering,but various results obtained with vapor phase reflow soldering will be discussed comparatively as well.

Whilst many companies invest time,effort and cost into up front work to fix snags which would lead to issues with yield during production,this paper shows the efforts of the company who looks to take things further. With increasing pressure on cost reduction within our industry,companies are looking ever more closely at their manufacturing process. In order to remain globally competitive and even to succeed in their local market every dollar saved here helps the bottom line. However,in many areas there is a danger that lower price equals lower quality and therefore actually results in higher costs in the end. The approach here involves spending a little more money than normal at the start of a project but less than hundreds of dollars and the results show savings of many times more than this outlay. However,it is acknowledged that this does take a little more time to get the job onto the shop floor. The key to this methodology is that it needs the time and effort of a skilled team and time on a production line before the job is started. But as the paper shows it really does improve yield,reduce cost,save the potential issues around repair and gives better reliability. In essence the results of the solder paste printing process are analyzed,after the components are placed,using X-ray and these results compared to the results after reflow soldering. The resultant pre-reflow solder paste shapes are impossible to see with the naked eye or by lifting the components,as the paste would not release evenly. This allows the engineer to determine how differences in printed paste shape and volume react when components are placed on them and how ultimately this affects product quality. Post reflow problems including mid-chip solder balls were found to be common faults,as were issues under BGAs including insufficient solder and shorts. The product is run on a “real line” and the results evaluated. Improvements are then made to the stencil design and other key process parameters to ensure that when in production the board is producing acceptable yields.