Soldering has been a key process step in the manufacture of electronic assemblies since the earliest days of the electronics industry,it is also one of the most challenging processes to control and predict and a major source of defects and failure. For several years,the elimination of solder from the electronic circuit assembly manufacturing process has been suggested as a potential way to sidestep solder technology’s many short comings. Elimination of solder can in fact be relatively easily accomplished by simply reversing the manufacturing process. That is,rather than building printed circuits and then placing components and soldering to them together,it is here proposed that boards containing components,with the component’s planar terminations exposed on the surfaces of said component boards,have circuits applied to them using PCB buildup technologies which are now well established in the PCB industry. By bypassing the soldering process,the resulting assemblies offer significant benefits and improvement potential in terms of cost,reliability,security and environmental friendliness among others. While the manufacturing infrastructure to build such structures is fundamentally in place and ready to go,the design approach,mentality and some tools which are presently available are less ready. This paper will examine,by way of demonstration,the challenges associated with designing SAFE (solderless assembly for electronics) products. In the paper,a current product board is redesigned using all preferred case design rules which include,a fundamental grid pitch for all components resulting in a design which is substantially smaller than the original design and yet which are less challenging to the circuit manufacturer than most current leading edge designs. The paper will identify the limitations of current design tools relative to executing such designs and offer suggestions as to how those tools might be improved to make the manufacture of solder free electronic assemblies easier. It will also describe and suggest novel ways of integrating passive devices into such electronic assemblies to further conserve space and improve performance.